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systemc: Implement the sc_*_resolved classes.
[gem5.git]
/
configs
/
common
/
CacheConfig.py
2018-03-06
Gabe Black
config: Switch from the print statement to the print...
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2017-07-03
Andreas Sandberg
config: Move core timing models to config/common/cores
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2017-05-09
Gabe Black
config: Fix up some configs to not use CPU aliases.
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2016-08-12
Andreas Hansson
mem: Add snoop filter to SystemXBar by default
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2016-06-20
Andreas Hansson
config: Fix omission of walker cache in config scripts
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2016-05-27
Stephan Diestelhorst
mem, config: Selective use of snoop filter
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2016-02-07
Steve Reinhardt
style: remove trailing whitespace
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2015-12-07
Radhika Jagtap
config: Enable elastic trace capture and replay in...
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2015-07-03
Andreas Hansson
mem: Allow read-only caches and check compliance
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2015-04-08
Curtis Dunham
config: Support full-system with SST's memory system
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2015-03-02
Andreas Hansson
mem: Move crossbar default latencies to subclasses
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2014-12-23
Marco Elver
config: Add --memchecker option
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2014-09-20
Andreas Hansson
mem: Rename Bus to XBar to better reflect its behaviour
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2013-07-18
Andreas Hansson
config: Update script to set cache line size on system
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2013-06-27
Akash Bagdia
sim: Add the notion of clock domains to all ClockedObjects
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2013-06-27
Akash Bagdia
config: Add a CPU clock command-line option
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2013-02-15
Andreas Sandberg
config: Remove O3 dependencies
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2012-10-15
Andreas Hansson
Regression: Use CPU clock and 32-byte width for L1...
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2012-05-31
Andreas Hansson
Bus: Split the bus into a non-coherent and coherent bus
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2012-03-01
Nilay Vaish
x86: Fix switching of CPUs
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2012-02-14
Andreas Hansson
Script: Fix the scripts that use the num_cpus cache...
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2012-02-13
Andreas Hansson
MEM: Introduce the master/slave port roles in the Pytho...
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2012-01-28
Gabe Black
Merge with the main repo.
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2012-01-26
Ronald Dreslinski
configs: A more realistic configuration of an ARM-like...
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2011-02-23
Korey Sewell
configs: cache: add cache line size option
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2011-02-23
Korey Sewell
configs: set default cache params
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2011-02-04
Gabe Black
Config: Keep track of uncached and cached ports separately.
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2011-02-02
Gabe Black
X86: Add L1 caches for the TLB walkers.
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2010-02-25
Lisa Hsu
configs: pull out cache configuration code from se...
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