MEM: Prepare mport for master/slave split
[gem5.git] / configs / common /
2012-02-14 Andreas HanssonScript: Fix the scripts that use the num_cpus cache...
2012-02-13 Andreas HanssonMEM: Introduce the master/slave port roles in the Pytho...
2012-02-12 Ali Saidiconfigs: fix minor config bugs posted on the mailing...
2012-02-12 Mrinmoy Ghoshprefetcher: Make prefetcher a sim object instead of...
2012-02-05 Gabe BlackX86: Rename the bridge which allows commnication back...
2012-02-01 Gabe BlackMerge ... head, hopefully the last time for this batch.
2012-01-31 Gabe BlackMerge with main repository.
2012-01-29 Gabe BlackYet another merge with the main repository.
2012-01-28 Gabe BlackSE/FS: Get rid of FULL_SYSTEM in the configs directory
2012-01-28 Gabe BlackSE/FS: Make SE vs. FS mode a runtime parameter.
2012-01-28 Gabe BlackMerge with the main repo.
2012-01-26 Ronald Dreslinskiconfigs: actually add ARMv7a-like cpu/cache file
2012-01-26 Ronald Dreslinskiconfigs: A more realistic configuration of an ARM-like...
2012-01-16 Gabe BlackMerge yet again with the main repository.
2012-01-23 Nilay VaishConfig: Enable using O3 CPU and Ruby in SE mode
2012-01-17 Andreas HanssonMEM: Removing the default port peer from Python ports
2012-01-17 Andreas HanssonMEM: Make the bus bridge unidirectional and fixed addre...
2012-01-17 Andreas HanssonMEM: Add port proxies instead of non-structural ports
2012-01-11 Nilay VaishConfig: Add support for restoring using a timing CPU
2012-01-10 Ali SaidiAutomated merge with ssh://repo.gem5.org/gem5
2012-01-10 Nilay VaishConfig: Remove short option string for cpu type
2012-01-10 Ali SaidiARM: Add support for running multiple systems
2012-01-10 Ali SaidiARM: Add support for initparam m5 op
2012-01-10 Ali Saidicpu2000: Add missing art benchmark to all
2012-01-07 Gabe BlackAnother merge with the main repository.
2012-01-07 Gabe BlackMerge with the main repository again.
2012-01-07 Gabe BlackMerge with main repository.
2012-01-05 Nilay VaishConfig: Add an option of type 'choice' for cpu type
2011-12-15 Anthony GutierrezARM: Update config files for Android/BBench images...
2011-12-01 Chander SudanthiO3: Remove hardcoded tgts_per_mshr in O3CPU.py.
2011-10-19 Ali SaidiARM: Fix small bug in config script that prevents andro...
2011-08-19 Ali SaidiARM: Add some MP regressions and clean up the disk...
2011-08-19 Ali SaidiARM: Add VExpress_E support with PCIe to gem5
2011-08-19 Ali SaidiARM: Add support for Versatile Express boards
2011-05-23 Steve Reinhardtconfig: revamp x86 config to avoid appending to SimObje...
2011-05-23 Korey Sewellconfigs: missed spot progress-interval change
2011-05-20 Korey Sewellconfigs: cleanup redundant/unused options
2011-05-05 Ali SaidiARM: Configure bootloader parameters
2011-04-21 Nathan Binkertpython: fix another bug from changes to main.py
2011-04-04 Ali SaidiARM: Include IDE/CF controller by default in PBX model.
2011-04-04 Anthony GutierrezSim: Fix Simulation.py to allow more than 1 core for...
2011-03-18 Ali SaidiAutomated merge with ssh://hg@repo.m5sim.org/m5
2011-03-18 Ali SaidiARM: Bare metal system should have 256MB of RAM.
2011-03-18 Ali SaidiMem: Fix issue with dirty block being lost when entire...
2011-02-24 Gabe BlackConfigs: Explicitly import env in Benchmarks.py
2011-02-23 Ali SaidiARM: Clarifies creation of Linux and baremetal ARM...
2011-02-23 Korey Sewellconfigs: cache: add cache line size option
2011-02-23 Korey Sewellconfigs: set default cache params
2011-02-22 Brad Beckmannm5: merged in hammer fix
2011-02-16 Nathan Binkertmerge alpha system files into tree
2011-02-12 Ali SaidiVNC: Add VNC server to M5
2011-02-08 Brad Beckmannconfig: fixed minor bug connecting dma devices to ruby
2011-02-07 Gabe BlackX86, Config: Move the setting of work count options...
2011-02-07 Brad Beckmannm5: added work completed monitoring support
2011-02-07 Brad Beckmannruby: x86 fs config support
2011-02-04 Gabe BlackConfig: Keep track of uncached and cached ports separately.
2011-02-03 Gabe BlackX86: Change how the default disk image gets set up.
2011-02-02 Gabe BlackX86: Add L1 caches for the TLB walkers.
2010-11-18 Gabe BlackConfig: Change misleading "cycle" message to say "tick".
2010-11-15 Ali SaidiARM: Add support for a dumb IDE controller
2010-11-08 Ali SaidiMem: Finish half-baked support for mmaping file in...
2010-08-24 Brad Beckmannconfig: fixed ruby dma device connections
2010-08-23 Ali SaidiARM: Add configuration for Linux/Full System
2010-08-20 Brad Beckmannruby: Reduced ruby latencies
2010-08-20 Brad Beckmannconfig: reorganized how ruby specifies command-line...
2010-08-17 Steve Reinhardtmisc: add some AMD copyright notices
2010-08-17 Steve Reinhardtsim: fold checkpoint restore code into instantiate()
2010-08-17 Steve Reinhardtconfigs: clean up checkpoint code in Simulation.py
2010-08-17 Steve Reinhardtsim: make Python Root object a singleton
2010-08-09 Nathan BinkertNone, not none
2010-07-06 Steve Reinhardtutil: add a script for testing checkpointing
2010-06-02 Ali SaidiARM: fix sizes of structs for ARM Linux
2010-04-19 Nathan Binkertconfig: fix assertion for x86 in FSConfig.py
2010-03-22 Brad Beckmannruby: Reorganized Ruby topology and protocol files
2010-03-22 Brad Beckmannruby: Adds configurable bit selection for numa mapping
2010-03-22 Brad Beckmannruby: Ruby support for sparse memory
2010-03-22 Brad Beckmannruby: fixed how ruby_fs creates phsyical memory
2010-02-25 Lisa Hsuconfigs: pull out cache configuration code from se...
2010-01-30 Brad Beckmannruby: Converted Garnet to M5 configuration
2010-01-30 Brad Beckmannruby: Added a mesh topology
2010-01-30 Brad Beckmannruby: MOESI_CMP_token updates to use the new config...
2010-01-30 Brad Beckmannruby: FS support using the new configuration system
2010-01-30 Brad Beckmannruby: reorganized ruby python configuration
2010-01-22 Derek HowerAutomated merge with ssh://hg@m5sim.org/m5
2010-01-19 Derek Howermerge
2009-12-19 Gabe BlackX86: Record the memory mode when building an X86 system.
2009-11-18 Brad Beckmannm5: Added option to take a checkpoint at the end of...
2009-11-18 Brad Beckmannm5: Moved profile option since Simulation depends on it.
2009-11-18 Brad Beckmannruby: Support for merging ALPHA_FS and ruby
2009-09-22 Nathan Binkertpython: Move more code into m5.util allow SCons to...
2009-09-16 Korey Sewellconfigs: add maxinsts option on command line
2009-05-05 Korey Sewellcpus: fix cpu progress event
2009-05-05 Korey Sewellmerge code
2009-05-05 Korey Sewellcpus: fix cpu progress event
2009-04-26 Gabe BlackX86, Config: Make makeX86System consider the number...
2008-07-16 Steve Reinhardtmem: use single BadAddr responder per system.
2009-04-21 Steve ReinhardtMinor tweaks for future Ruby compatibility.
2009-04-19 Gabe BlackX86: Actually put the PCI INTA entry into the MP tables.
2009-04-19 Gabe BlackX86: Make E820 report nice, round (and correct) numbers.
2009-04-19 Gabe BlackX86: Automatically make the IO APIC in an N CPU system...
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