Ruby System: Convert to Clocked Object
[gem5.git] / configs /
2012-09-09 Nilay Vaishse.py: support specifying multiple programs via command...
2012-08-22 Andreas HanssonBridge: Remove NACKs in the bridge and unify with packe...
2012-08-21 Andreas HanssonCheckpoint: Fix broken checkpointing functionality
2012-08-17 Jason PowerRuby: Add RubySystem parameter to MemoryControl
2012-08-15 Anthony Gutierrezconfigs: add option for repeatedly switching back-and...
2012-08-10 Jason PowerRuby: Clean up topology changes
2012-08-06 Nilay VaishSimulation.py: move code related to checkpointing to...
2012-08-06 Nilay VaishConfig: change how cpu class is set
2012-07-23 Andreas HanssonConfig: Use clock option in se/fs script and pass to...
2012-07-12 Andreas HanssonMem: Make SimpleMemory single ported
2012-07-11 Brad Beckmannruby: remove the cpu assumptions for the random tester
2012-07-11 Brad Beckmannruby: changes how Topologies are created
2012-06-11 Anthony Gutierrezconfigs: add run scripts for ics/gb versions of android...
2012-06-07 Nilay VaishConfig: call to setWorkCountOptions() for all ISAs
2012-06-07 Nilay VaishConfig: Remove setMipsOptions
2012-06-07 Nilay VaishConfig: changes to a couple of error msgs
2012-05-31 Andreas HanssonBus: Split the bus into a non-coherent and coherent bus
2012-05-16 Andreas HanssonConfig: Fix a typo in the se.py script for setting...
2012-05-03 Jayneel GandhiConfig: Fix help msg for option --mem-size
2012-04-17 Jayneel GandhiSE Config: Changed se.py to support multithreaded mode
2012-04-16 Jayneel GandhiConfig: Add command line options for disk image and...
2012-04-06 Brad Beckmannruby: set SimpleTiming as the default cpu
2012-04-06 Brad Beckmannrubytest: seperated read and write ports.
2012-04-06 Andreas HanssonMEM: Enable multiple distributed generalized memories
2012-04-05 Nilay VaishConfig: corrects the way Ruby attaches to the DMA ports
2012-04-05 Andreas HanssonRuby: Fix the example configurations option parsing
2012-04-03 Andreas HanssonAtomic: Remove the physmem_port and access memory directly
2012-03-30 Andreas HanssonRuby: Remove the physMemPort and instead access memory...
2012-03-28 Nilay VaishConfig: Change the way options are added
2012-03-27 Nilay VaishConfig: Move setWorkCountOptions() to Simulation.py
2012-03-16 Nilay Vaishruby_fs.py: Add call to createInterruptController()
2012-03-16 Nilay VaishFSConfig.py: fix a typo makeLinuxAlphaRubySystem
2012-03-11 Nilay Vaishse.py: Changes to ruby portion due to SE/FS merge
2012-03-09 Ali SaidiARM: Fix memory starting at non-zero address and exceed...
2012-03-09 Geoffrey BlakeCheckerCPU: Make CheckerCPU runtime selectable instead...
2012-03-09 Ali Saidicache: Allow main memory to be at disjoint address...
2012-03-01 Ali SaidiARM: Add support for Versatile Express extended memory map
2012-03-01 Nilay Vaishx86: Fix switching of CPUs
2012-03-01 Nilay VaishConfig: make option ruby available always
2012-02-26 Gabe BlackMake the IO bridge accept address headed to all the...
2012-02-14 Andreas HanssonMEM: Fix residual bus ports and make them master/slave
2012-02-14 Andreas HanssonScript: Fix the scripts that use the num_cpus cache...
2012-02-14 Andreas HanssonMEM: Fix master/slave ports in Ruby and non-regression...
2012-02-13 Andreas HanssonMEM: Introduce the master/slave port roles in the Pytho...
2012-02-12 Ali Saidiconfigs: fix minor config bugs posted on the mailing...
2012-02-12 Mrinmoy Ghoshprefetcher: Make prefetcher a sim object instead of...
2012-02-05 Gabe BlackX86: Rename the bridge which allows commnication back...
2012-02-01 Ali Saidiconfigs: More fixes for the memory system updates
2012-02-01 Gabe BlackMerge ... head, hopefully the last time for this batch.
2012-01-31 Gabe BlackMerge with main repository.
2012-01-30 Andreas HanssonRuby: Connect system port in Ruby network test
2012-01-29 Gabe BlackYet another merge with the main repository.
2012-01-29 Nilay VaishConfig: Enable O3 CPU and Ruby in FS mode
2012-01-28 Gabe BlackSE/FS: Get rid of FULL_SYSTEM in the configs directory
2012-01-28 Gabe BlackSE/FS: Make SE vs. FS mode a runtime parameter.
2012-01-28 Gabe BlackMerge with the main repo.
2012-01-26 Ronald Dreslinskiconfigs: actually add ARMv7a-like cpu/cache file
2012-01-26 Ronald Dreslinskiconfigs: A more realistic configuration of an ARM-like...
2012-01-25 Andreas HanssonMEM: Fix fs.py by specifying the range size rather...
2012-01-16 Gabe BlackMerge yet again with the main repository.
2012-01-23 Nilay VaishConfig: Enable using O3 CPU and Ruby in SE mode
2012-01-23 Nilay VaishO3, Ruby: Forward invalidations from Ruby to O3 CPU
2012-01-17 Andreas HanssonMEM: Removing the default port peer from Python ports
2012-01-17 Andreas HanssonMEM: Make the bus bridge unidirectional and fixed addre...
2012-01-17 Andreas HanssonMEM: Add port proxies instead of non-structural ports
2012-01-11 Nilay VaishRuby: Use map option for selecting b/w sparse and memor...
2012-01-11 Nilay VaishConfig: Add support for restoring using a timing CPU
2012-01-11 Nilay VaishRuby: remove the files related to the tracer
2012-01-10 Ali SaidiAutomated merge with ssh://repo.gem5.org/gem5
2012-01-10 Nilay VaishConfig: Remove short option string for cpu type
2012-01-10 Ali SaidiARM: Add support for running multiple systems
2012-01-10 Ali SaidiARM: Add support for initparam m5 op
2012-01-10 Ali Saidicpu2000: Add missing art benchmark to all
2012-01-07 Nilay VaishMerged with Nate's commit
2012-01-07 Nilay VaishRuby Cache: Add param for marking caches as instruction...
2012-01-07 Gabe BlackAnother merge with the main repository.
2012-01-07 Gabe BlackMerge with the main repository again.
2012-01-07 Gabe BlackMerge with main repository.
2012-01-05 Nilay VaishConfig: Add an option of type 'choice' for cpu type
2011-12-15 Anthony GutierrezARM: Update config files for Android/BBench images...
2011-12-01 glohconfig: command line option to specify ruby output...
2011-12-01 Chris EmmonsVNC: Add support for capturing frame buffer to file...
2011-12-01 Chander SudanthiO3: Remove hardcoded tgts_per_mshr in O3CPU.py.
2011-11-04 Tushar KrishnaGARNET: adding a fault model for resilient on-chip...
2011-10-30 Nilay VaishCommit due to merge.
2011-10-29 Nilay VaishRuby FS: Add the options for kernel and simulation...
2011-10-19 Ali SaidiARM: Fix small bug in config script that prevents andro...
2011-08-19 Ali SaidiARM: Add some MP regressions and clean up the disk...
2011-08-19 Ali SaidiARM: Add VExpress_E support with PCIe to gem5
2011-08-19 Ali SaidiARM: Add support for Versatile Express boards
2011-08-02 Nilay VaishScons: Drop RUBY as compile time option.
2011-07-26 Nilay VaishRuby: Fix instantiations of DMA controller and sequencer
2011-07-25 Nilay VaishMerged with Gabe's changeset.
2011-07-25 Nilay VaishRuby: Fix dma controller configs/ruby/MI_example.py
2011-07-12 Nilay Vaishse.py: Fixes the way ruby's options are added
2011-07-03 Nilay VaishMerged with Gabe's recent changes.
2011-07-03 Nilay VaishNetwork_test: Conform it with functional access changes...
2011-07-01 Brad Beckmannconfig: removed unnecessary slashes
2011-07-01 Brad Beckmann ext... Ruby: Add support for functional accesses
2011-06-17 Gedare BloomARM: Add m5ops and related support for workbegin()...
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