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dcache: Rework RAM wrapper to synthetize better on Xilinx
[microwatt.git] / core_debug.vhdl
2020-05-19 Anton BlanchardMerge branch 'master' into litedram blob | commitdiff | raw
2020-05-19 Anton BlanchardMerge pull request #176 from antonblanchard/console... blob | commitdiff | raw
2020-05-19 Anton BlanchardMerge pull request #174 from antonblanchard/yosys-fixes blob | commitdiff | raw
2020-05-18 Anton BlanchardMerge pull request #169 from paulusmack/mmu blob | commitdiff | raw
2020-05-14 Paul MackerrasMerge branch 'mmu' blob | commitdiff | raw
2020-05-08 Paul Mackerrasdebug: Provide a way to examine GPRs, fast SPRs and MSR blob | commitdiff | raw
2019-10-10 Anton BlanchardMerge pull request #79 from deece/uart_address blob | commitdiff | raw | diff to current
2019-10-09 Anton BlanchardMerge pull request #83 from paulusmack/logical blob | commitdiff | raw | diff to current
2019-10-09 Anton BlanchardMerge pull request #81 from antonblanchard/logical blob | commitdiff | raw | diff to current
2019-10-09 Anton BlanchardMerge pull request #82 from antonblanchard/icache-set... blob | commitdiff | raw | diff to current
2019-10-08 Benjamin Herrenschmidtfetch/icache: Fit icache in BRAM blob | commitdiff | raw | diff to current
2019-09-24 Anton BlanchardMerge branch 'divider' of https://github.com/paulusmack... blob | commitdiff | raw | diff to current
2019-09-24 Anton BlanchardMerge pull request #69 from antonblanchard/debug-module blob | commitdiff | raw | diff to current
2019-09-20 Benjamin HerrenschmidtAdd core debug module blob | commitdiff | raw | diff to current