icache_tb: Improve test and include test file
[microwatt.git] / execute1.vhdl
2019-10-17 Anton BlanchardMerge pull request #109 from antonblanchard/misc
2019-10-17 Anton Blanchardisel takes a CR bit, not a CR field
2019-10-16 Benjamin Herrenschmidtexecute1: Remove mux on "write_data" and "rc" outputs
2019-10-16 Benjamin Herrenschmidtcrhelpers: Constraint "crnum" integer
2019-10-16 Benjamin Herrenschmidtexecute1: Reformat
2019-10-16 Anton BlanchardMerge pull request #105 from paulusmack/writeback
2019-10-15 Paul MackerrasRemove execute2 stage
2019-10-15 Anton BlanchardMerge pull request #104 from paulusmack/master
2019-10-15 Paul MackerrasDo sign-extension instructions in writeback instead...
2019-10-15 Paul MackerrasImplement neg using OP_ADD
2019-10-11 Anton BlanchardMerge pull request #84 from classilla/master
2019-10-11 Anton BlanchardMerge pull request #89 from mikey/gitignore
2019-10-11 Anton BlanchardMerge pull request #90 from antonblanchard/newcrf-infer...
2019-10-11 Anton BlanchardDon't infer latch for newcrf
2019-10-10 Anton BlanchardMerge pull request #79 from deece/uart_address
2019-10-09 Anton BlanchardMerge pull request #83 from paulusmack/logical
2019-10-09 Anton BlanchardMerge pull request #81 from antonblanchard/logical
2019-10-08 Paul Mackerrasexecute: Consolidate count-leading/trailing-zeroes...
2019-10-08 Anton BlanchardConsolidate logical instructions
2019-10-07 Anton BlanchardMerge pull request #78 from paulusmack/new-decode
2019-10-07 Paul MackerrasAdd a rotate/mask/shift unit and use it in execute1
2019-10-04 Paul Mackerrasdecode: Avoid multiplexing from instruction reg fields...
2019-10-04 Paul MackerrasConsolidate add/subtract instructions into a single op
2019-10-02 Paul Mackerrasdecode: Remove const fields from decode_rom_t
2019-10-01 Paul Mackerrasdecode: Index minor op table with insn bits for opcode 31
2019-10-01 Paul Mackerrasdecode: Index minor op table with insn bits for opcode 30
2019-10-01 Paul Mackerrasdecode: Index minor op table with insn bits for opcode 19
2019-10-01 Paul Mackerrasdecode: Push mtspr/mfspr register decoding down into...
2019-10-01 Benjamin HerrenschmidtAdd MCRF instruction
2019-10-01 Benjamin HerrenschmidtImplement absolute branches
2019-09-30 Anton BlanchardMerge pull request #76 from antonblanchard/misc
2019-09-30 Benjamin Herrenschmidtexecute1: simplify flush_out
2019-09-24 Anton BlanchardMerge branch 'divider' of https://github.com/paulusmack...
2019-09-24 Anton BlanchardMerge pull request #70 from antonblanchard/badly-named...
2019-09-24 Anton BlanchardRename OP_SUBFC -> OP_SUBFE, OP_ADDC -> OP_ADDE
2019-09-23 Paul MackerrasAdd a divider unit and a testbench for it
2019-09-16 Anton BlanchardMerge pull request #62 from antonblanchard/byte-reverse...
2019-09-16 Anton BlanchardMerge pull request #61 from antonblanchard/execute...
2019-09-16 Anton Blanchardexecute1 no longer needs sim_console
2019-09-11 Anton BlanchardMerge pull request #43 from mikey/trivial
2019-09-11 Michael NeulingRemove FIXME comment
2019-09-11 Anton BlanchardMerge pull request #41 from mikey/travis
2019-09-11 Anton BlanchardMerge pull request #42 from antonblanchard/fetch-rework-v2
2019-09-11 Anton BlanchardRemove sim console
2019-09-11 Anton BlanchardMove debug execute output into decode2
2019-09-11 Anton BlanchardRework pipeline, add stall and flush signals
2019-08-31 Anton BlanchardMerge pull request #13 from mikey/dynamic-ranges
2019-08-30 Michael NeulingRemove dynamic ranges from code
2019-08-29 Anton BlanchardMerge pull request #7 from riktw/fusesoc_arty_a7
2019-08-28 Anton BlanchardMerge pull request #5 from antonblanchard/travis-test
2019-08-28 Anton BlanchardAdd srd and srw
2019-08-28 Anton BlanchardAdd sim only divw
2019-08-22 Anton BlanchardInitial import of microwatt