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mw_debug: Fix memory overflow with "sim" backend
[microwatt.git]
/
fetch1.vhdl
2020-05-19
Anton Blanchard
Merge branch 'master' into litedram
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2020-05-19
Anton Blanchard
Merge pull request #176 from antonblanchard/console...
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2020-05-19
Anton Blanchard
Merge pull request #174 from antonblanchard/yosys-fixes
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2020-05-18
Anton Blanchard
Merge pull request #169 from paulusmack/mmu
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2020-05-14
Paul Mackerras
Merge branch 'mmu'
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2020-05-14
Anton Blanchard
Merge pull request #170 from antonblanchard/litedram
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2020-05-08
Paul Mackerras
Add TLB to icache
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2020-05-08
Benjamin Herrenschmidt
core: Add alternate reset address
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2019-10-10
Anton Blanchard
Merge pull request #79 from deece/uart_address
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2019-10-09
Anton Blanchard
Merge pull request #83 from paulusmack/logical
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2019-10-09
Anton Blanchard
Merge pull request #81 from antonblanchard/logical
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2019-10-09
Anton Blanchard
Merge pull request #82 from antonblanchard/icache-set...
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2019-10-08
Benjamin Herrenschmidt
fetch/icache: Fit icache in BRAM
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2019-10-08
Benjamin Herrenschmidt
fetch1: Simplify a bit
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2019-09-30
Anton Blanchard
Merge pull request #76 from antonblanchard/misc
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2019-09-30
Benjamin Herrenschmidt
Simplify fetch1
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2019-09-30
Benjamin Herrenschmidt
Reformat fetch1
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2019-09-24
Anton Blanchard
Merge branch 'divider' of https://github.com/paulusmack...
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2019-09-24
Anton Blanchard
Merge pull request #69 from antonblanchard/debug-module
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2019-09-20
Benjamin Herrenschmidt
Add core debug module
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2019-09-15
Anton Blanchard
Merge pull request #55 from antonblanchard/fetch-fix
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2019-09-15
Anton Blanchard
Add a default value for RESET_ADDRESS
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2019-09-11
Anton Blanchard
Merge pull request #41 from mikey/travis
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2019-09-11
Anton Blanchard
Merge pull request #42 from antonblanchard/fetch-rework-v2
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2019-09-11
Anton Blanchard
Rework pipeline, add stall and flush signals
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2019-08-22
Anton Blanchard
Initial import of microwatt
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