Improve write_verilog specify support
[yosys.git] / frontends / ast / simplify.cc
2019-05-03 Eddie HungMerge remote-tracking branch 'origin/master' into cliff...
2019-05-03 Clifford WolfMerge pull request #969 from YosysHQ/clifford/pmgenstuff
2019-05-03 Clifford WolfMerge pull request #984 from YosysHQ/eddie/fix_982
2019-05-03 Clifford WolfMerge pull request #976 from YosysHQ/clifford/fix974
2019-05-02 Eddie HungMerge remote-tracking branch 'origin/master' into eddie...
2019-05-01 Eddie HungMerge branch 'master' of github.com:YosysHQ/yosys
2019-05-01 Clifford WolfAdd splitcmplxassign test case and silence splitcmplxas...
2019-04-30 Clifford WolfDisabled "final loop assignment" feature
2019-04-30 Clifford WolfMerge pull request #972 from YosysHQ/clifford/fix968
2019-04-30 Clifford WolfAdd final loop variable assignment when unrolling for...
2019-04-30 Benedikt TutzerMerge branch 'master' of https://github.com/YosysHQ...
2019-04-22 Eddie HungMerge pull request #914 from YosysHQ/xc7srl
2019-04-22 Clifford WolfMerge pull request #952 from YosysHQ/clifford/fix370
2019-04-22 Eddie HungMerge remote-tracking branch 'origin/master' into xc7srl
2019-04-22 Clifford WolfDetermine correct signedness and expression width in...
2019-04-22 Clifford WolfMerge pull request #905 from christian-krieg/feature...
2019-04-22 Clifford WolfMerge pull request #941 from Wren6991/sim_lib_io_clke
2019-04-22 Clifford WolfMerge branch 'master' of https://github.com/dh73/yosys_...
2019-04-22 Clifford WolfMerge pull request #916 from YosysHQ/map_cells_before_m...
2019-04-22 Clifford WolfMerge pull request #911 from mmicko/gowin-nobram
2019-04-22 Clifford WolfMerge pull request #909 from zachjs/master
2019-04-09 Zachary Snowsupport repeat loops with constant repeat counts outsid...
2019-03-28 Benedikt TutzerMerge remote-tracking branch 'origin/master' into featu...
2019-03-22 Eddie HungMerge remote-tracking branch 'origin/master' into xc7srl
2019-03-22 Clifford WolfMerge pull request #889 from YosysHQ/clifford/fix888
2019-03-21 Clifford WolfFix mem2reg handling of memories with upto data ports...
2019-03-19 Eddie HungMerge remote-tracking branch 'origin/master' into xc7srl
2019-03-19 Eddie HungMerge https://github.com/YosysHQ/yosys into read_aiger
2019-03-19 Clifford WolfMerge pull request #884 from zachjs/master
2019-03-19 Zachary Snowfix local name resolution in prefix constructs
2019-03-14 Eddie HungMerge remote-tracking branch 'origin/master' into xc7srl
2019-03-14 Clifford WolfMerge pull request #869 from cr1901/win-shell
2019-03-13 Clifford WolfMerge pull request #868 from YosysHQ/clifford/fixmem
2019-03-12 Clifford WolfImprove handling of memories used in mem index expressi...
2019-03-12 Clifford WolfRemove outdated "blocking assignment to memory" warning
2019-03-12 Clifford WolfOnly set MEM2REG_FL_CONST_LHS/MEM2REG_FL_VAR_LHS for...
2019-03-09 Clifford WolfMerge pull request #859 from smunaut/ice40_braminit
2019-03-09 Clifford WolfMerge pull request #858 from YosysHQ/clifford/svalabels
2019-03-08 Clifford WolfMerge branch 'master' of github.com:YosysHQ/yosys
2019-03-08 Clifford WolfFix handling of task output ports in clocked always...
2019-03-07 Clifford WolfAdd support for SVA labels in read_verilog
2019-03-05 Clifford WolfMerge pull request #842 from litghost/merge_upstream
2019-03-05 Clifford WolfMerge pull request #850 from daveshah1/ecp5_warn_conflict
2019-03-03 Clifford WolfMerge pull request #848 from YosysHQ/clifford/fix763
2019-03-03 Clifford WolfMerge pull request #849 from YosysHQ/clifford/dynports
2019-03-02 Clifford WolfOnly run derive on blackbox modules when ports have...
2019-03-02 Clifford WolfFix $global_clock handling vs autowire
2019-03-02 Clifford WolfMerge pull request #847 from YosysHQ/clifford/fix785
2019-03-02 Clifford WolfFix $readmem[hb] for mem2reg memories, fixes #785
2019-03-02 Clifford WolfMerge pull request #843 from YosysHQ/clifford/mem2regco...
2019-03-01 Clifford WolfUse mem2reg on memories that only have constant-index...
2019-02-28 Clifford WolfMerge pull request #794 from daveshah1/ecp5improve
2019-02-24 Clifford WolfMerge pull request #812 from ucb-bar/arrayhierarchyfixes
2019-02-24 Clifford WolfMerge pull request #824 from litghost/fix_reduce_on_ff
2019-02-24 Clifford WolfFix handling of defparam for when default_nettype is...
2019-02-22 Clifford WolfMerge pull request #819 from YosysHQ/clifford/optd
2019-02-22 Clifford WolfMerge pull request #820 from YosysHQ/clifford/fix810
2019-02-21 Clifford WolfFixes related to handling of autowires and upto-ranges...
2019-02-21 Clifford WolfFix handling of expression width in $past, fixes #810
2019-01-02 Clifford WolfMerge pull request #750 from Icenowy/anlogic-ff-init
2018-12-22 Clifford WolfMerge pull request #757 from whitequark/manual_mem
2018-12-19 Clifford WolfMerge pull request #752 from Icenowy/anlogic-lut-cost
2018-12-19 Clifford WolfMerge pull request #753 from Icenowy/anlogic-makefile-fix
2018-12-19 Clifford WolfMerge pull request #749 from Icenowy/anlogic-dram-fix
2018-12-18 Clifford WolfMerge pull request #748 from makaimann/add-btor-ops
2018-12-18 Clifford WolfFix segfault in AST simplify
2018-12-16 Clifford WolfMerge pull request #704 from webhat/feature/fix-awk
2018-12-05 Clifford WolfMerge pull request #709 from smunaut/issue_708
2018-12-01 Clifford WolfMerge pull request #676 from rafaeltp/master
2018-11-24 Sylvain MunautMake return value of $clog2 signed
2018-11-12 Clifford WolfMerge pull request #695 from daveshah1/ecp5_bb
2018-11-04 Clifford WolfVarious indenting fixes in AST front-end (mostly space...
2018-11-04 Clifford WolfMerge pull request #687 from trcwm/master
2018-11-04 Clifford WolfMerge pull request #688 from ZipCPU/rosenfell
2018-11-03 ZipCPUMake and dependent upon LSB only
2018-11-01 Clifford WolfDo not generate "reg assigned in a continuous assignmen...
2018-10-19 Clifford WolfMerge pull request #672 from daveshah1/fix_bram
2018-10-18 Clifford WolfMerge pull request #659 from rubund/sv_interfaces
2018-10-18 Clifford WolfMerge pull request #657 from mithro/xilinx-vpr
2018-10-18 Clifford WolfMerge pull request #664 from tklam/ignore-verilog-protect
2018-10-17 Clifford WolfMerge pull request #660 from tklam/parse-liberty-detect...
2018-10-17 Clifford WolfMerge pull request #663 from aman-goel/master
2018-10-17 Clifford WolfMerge pull request #658 from daveshah1/ecp5_bram
2018-10-17 Clifford WolfMerge pull request #641 from tklam/master
2018-10-17 Clifford WolfMerge pull request #638 from udif/pr_reg_wire_error
2018-10-16 Clifford WolfMerge branch 'yosys-0.8-rc'
2018-10-12 Ruben UndheimSynthesis support for SystemVerilog interfaces
2018-10-05 Clifford WolfMerge pull request #651 from ARandomOWL/stdcells_fix
2018-10-03 tklamMerge branch 'master' of https://github.com/YosysHQ...
2018-10-02 Clifford WolfMerge pull request #645 from daveshah1/ecp5_dram_fix
2018-10-01 Dan GisselquistAdd read_verilog $changed support
2018-10-01 Aman GoelMerge pull request #4 from YosysHQ/master
2018-09-30 Clifford WolfMerge branch 'yosys-0.8-rc' of github.com:YosysHQ/yosys
2018-09-30 Clifford WolfFix handling of $past 2nd argument in read_verilog
2018-09-24 Udi FinkelsteinFixed issue #630 by fixing a minor typo in the previous...
2018-09-17 Udi FinkelsteinMerge branch 'master' into pr_reg_wire_error
2018-09-17 Udi FinkelsteinFixed remaining cases where we check fo wire reg/wire...
2018-08-22 Jim LawsonMerge pull request #1 from YosysHQ/master
2018-08-18 Aman GoelMerge pull request #3 from YosysHQ/master
2018-08-15 Clifford WolfMerge pull request #573 from cr1901/msys-64
next