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Cover __APPLE__ too for little to big endian
[yosys.git]
/
frontends
/
verilog
/
const2ast.cc
2019-06-13
Serge Bazanski
Merge pull request #829 from abdelrahmanhosny/master
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2019-06-12
Eddie Hung
Merge remote-tracking branch 'origin/master' into xaig
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2019-06-07
Clifford Wolf
Merge branch 'pr_elab_sys_tasks' of https://github...
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2019-06-06
David Shah
Merge pull request #1073 from whitequark/ecp5-diamond-iob
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2019-06-05
Clifford Wolf
Merge pull request #999 from jakobwenzel/setundefInitFix
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2019-05-31
Eddie Hung
Merge branch 'xaig' into xc7mux
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2019-05-28
Eddie Hung
Merge remote-tracking branch 'origin/master' into xc7mux
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2019-05-27
Stefan Biereigel
Merge branch 'master' into wandwor
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2019-05-27
Clifford Wolf
Merge pull request #1044 from mmicko/invalid_width_range
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2019-05-27
Clifford Wolf
Merge pull request #1043 from mmicko/unsized_constant
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2019-05-27
Miodrag Milanovic
Added support for unsized constants, fixes #1022
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2019-03-28
Benedikt Tutzer
Merge remote-tracking branch 'origin/master' into featu...
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2018-09-17
Udi Finkelstein
Merge branch 'master' into pr_reg_wire_error
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2018-08-22
Jim Lawson
Merge pull request #1 from YosysHQ/master
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2018-08-18
Aman Goel
Merge pull request #3 from YosysHQ/master
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2018-08-15
Clifford Wolf
Merge pull request #573 from cr1901/msys-64
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2018-08-15
Clifford Wolf
Merge pull request #576 from cr1901/no-resource
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2018-08-15
Clifford Wolf
Merge pull request #513 from udif/pr_reg_wire_error
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2018-08-15
Clifford Wolf
Merge pull request #562 from udif/pr_fix_illegal_port_decl
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2018-07-20
Clifford Wolf
Merge pull request #586 from hzeller/more-sourcepos...
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2018-07-20
Henner Zeller
Convert more log_error() to log_file_error() where...
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2016-07-08
Clifford Wolf
Merge branch 'yosys-0.5-vtr' of https://github.com...
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2015-12-07
Clifford Wolf
Merge pull request #108 from cseed/master
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2015-09-22
Clifford Wolf
Fixed segfault on invalid verilog constant 1'b_
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2015-08-17
Clifford Wolf
Small corrections to const2ast warning messages
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2015-08-17
Florian Zeitz
Check base-n literals only contain valid digits
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2015-08-17
Florian Zeitz
Warn on literals exceeding the specified bit width
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2015-08-14
Larry Doolittle
Another block of spelling fixes
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2015-08-12
Clifford Wolf
Merge pull request #70 from gaomy3832/bugfix
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2015-08-11
Clifford Wolf
Fixed handling of [a-fxz?] in decimal constants
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2015-07-02
Clifford Wolf
Fixed trailing whitespaces
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2015-04-03
Ahmed Irfan
Merge branch 'master' of https://github.com/cliffordwol...
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2014-11-24
Clifford Wolf
Fixed two minor bugs in constant parsing
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2014-11-14
Clifford Wolf
Added warning for use of 'z' constants in HDL
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2014-09-22
Ahmed Irfan
Merge branch 'master' of https://github.com/cliffordwol...
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2014-07-31
Clifford Wolf
Moved some stuff to kernel/yosys.{h,cc}, using Yosys...
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2014-07-28
Clifford Wolf
Using log_assert() instead of assert()
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2014-06-15
Clifford Wolf
Improved parsing of large integer constants
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2014-01-24
Clifford Wolf
Merge branch 'btor' of https://github.com/ahmedirfan198...
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2014-01-24
Clifford Wolf
Fixed handling of unsized constants in verilog frontend
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2013-07-09
Clifford Wolf
Merge branch 'master' of github.com:cliffordwolf/yosys
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2013-07-09
Clifford Wolf
Major redesign of expr width/sign detecion (verilog...
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2013-06-07
Clifford Wolf
Added SAT generator and simple sat_solve command
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2013-01-05
Clifford Wolf
initial import
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