ecp5: Force SIGNED ports to be 1 bit
[yosys.git] / frontends /
2020-03-12 N. EngelhardtMerge pull request #1751 from boqwxp/add_assert
2020-03-12 Miodrag MilanovićMerge pull request #1757 from jiegec/fix-emcc
2020-03-11 Marcus Comstedtrefixed parsing of constant with comment between size...
2020-03-11 jiegecFix compilation for emcc
2020-03-11 Eddie HungMerge pull request #1743 from YosysHQ/eddie/abc9_keep
2020-03-11 Eddie HungMerge pull request #1744 from YosysHQ/eddie/fix1675
2020-03-10 Eddie Hungverilog: also set location for simple_behavioral_stmt
2020-03-10 David ShahMerge pull request #1753 from YosysHQ/dave/abc9-speedup
2020-03-10 David ShahMerge pull request #1721 from YosysHQ/dave/tribuf-unused
2020-03-10 Alberto GonzalezSet AST source locations in more parser rules.
2020-03-09 Eddie HungMerge pull request #1747 from YosysHQ/claire/partselfix
2020-03-09 N. EngelhardtMerge pull request #1716 from zeldin/ecp5_fix
2020-03-08 Claire WolfFix partsel expr bit width handling and add test case
2020-03-04 Eddie HungMerge pull request #1735 from YosysHQ/eddie/abc9_dsp48e1
2020-03-03 N. EngelhardtMerge pull request #1691 from ZirconiumX/use-flowmap...
2020-03-03 Claire WolfFix bison warning for "pure-parser" option
2020-03-03 Claire WolfMerge pull request #1718 from boqwxp/precise_locations
2020-03-03 Claire WolfMerge pull request #1681 from YosysHQ/eddie/fix1663
2020-03-03 Claire WolfMerge pull request #1519 from YosysHQ/eddie/submod_po
2020-03-02 Eddie HungMerge pull request #1724 from YosysHQ/eddie/abc9_specify
2020-02-29 Eddie HungMerge pull request #1727 from YosysHQ/eddie/fix_write_smt2
2020-02-28 Eddie HungMerge pull request #1726 from YosysHQ/eddie/fix1710
2020-02-28 Eddie Hungast: fixes #1710; do not generate RTLIL for unreachable...
2020-02-28 Eddie HungComment out log()
2020-02-27 Eddie Hungast: quiet down when deriving blackbox modules
2020-02-27 Claire WolfMerge pull request #1709 from rqou/coolrunner2_counter
2020-02-27 Claire WolfMerge pull request #1708 from rqou/coolrunner2-buf-fix
2020-02-26 Miodrag MilanovićMerge pull request #1705 from YosysHQ/logger_pass
2020-02-23 Alberto GonzalezCloses #1717. Add more precise Verilog source location...
2020-02-21 Eddie HungMerge pull request #1703 from YosysHQ/eddie/specify_improve
2020-02-20 Claire WolfMerge pull request #1642 from jjj11x/jjj11x/sv-enum
2020-02-19 Eddie Hungverilog: add support for more delays than just rise...
2020-02-17 Jeff Wangremove unnecessary blank line
2020-02-17 Jeff Wangadd attributes for enumerated values in ilang
2020-02-17 Jeff Wangseparate out enum_item/param implementation when they...
2020-02-14 Eddie Hungverilog: ignore ranges too without -specify
2020-02-13 Eddie Hungverilog: improve specify support when not in -specify...
2020-02-13 Eddie Hungverilog: ignore '&&&' when not in -specify mode
2020-02-13 Eddie Hungspecify: system timing checks to accept min:typ:max...
2020-02-13 Eddie Hungverilog: fix $specify3 check
2020-02-13 Claire WolfMerge pull request #1694 from rqou/json_compat_fix
2020-02-13 N. EngelhardtMerge pull request #1679 from thasti/delay-parsing
2020-02-10 Eddie HungMerge pull request #1670 from rodrigomelo9/master
2020-02-10 N. EngelhardtMerge pull request #1669 from thasti/pyosys-attrs
2020-02-07 whitequarkast: avoid intermediate wires/assigns when lowering...
2020-02-06 Rodrigo Alejandro... Modified $readmem[hb] to use '\' or '/' according the OS
2020-02-06 Eddie Hungverilog: instead of modifying localparam size, extend...
2020-02-05 Eddie HungMerge pull request #1576 from YosysHQ/eddie/opt_merge_init
2020-02-05 Eddie HungMerge remote-tracking branch 'origin/master' into eddie...
2020-02-05 Eddie HungMerge pull request #1638 from YosysHQ/eddie/fix1631
2020-02-05 Eddie HungMerge pull request #1661 from YosysHQ/eddie/abc9_required
2020-02-03 Stefan Biereigelcorrect wire declaration grammar for #1614
2020-02-03 Rodrigo A. MeloMerge branch 'master' into master
2020-02-03 Rodrigo Alejandro... Merge branch 'master' of https://github.com/YosysHQ...
2020-02-03 Rodrigo Alejandro... Replaced strlen by GetSize into simplify.cc
2020-02-02 David ShahMerge pull request #1516 from YosysHQ/dave/dotstar
2020-02-02 David Shahsv: Improve handling of wildcard port connections
2020-02-02 David Shahhierarchy: Resolve SV wildcard port connections
2020-02-02 David Shahsv: Add lexing and parsing of .* (wildcard port conns)
2020-02-02 David ShahMerge pull request #1647 from YosysHQ/dave/sprintf
2020-02-02 David ShahMerge pull request #1657 from YosysHQ/dave/xilinx-dsp...
2020-02-01 Rodrigo Alejandro... Fixed a bug in the new feature of $readmem[hb] when...
2020-02-01 Eddie HungMerge branch 'master' into eddie/submod_po
2020-02-01 Rodrigo Alejandro... Modified the new search for files of $readmem[hb] to...
2020-01-31 Rodrigo Alejandro... $readmem[hb] file inclusion is now relative to the...
2020-01-30 Claire WolfMerge pull request #1667 from YosysHQ/clifford/verificnand
2020-01-30 Claire WolfMerge pull request #1503 from YosysHQ/eddie/verific_help
2020-01-30 Claire WolfMerge pull request #1654 from YosysHQ/eddie/sby_fix69
2020-01-30 Claire WolfAdd Verific support for OPER_REDUCE_NAND
2020-01-29 Claire WolfMerge branch 'vector_fix' of https://github.com/Kmanfi...
2020-01-29 Claire WolfMerge pull request #1662 from YosysHQ/dave/opt-reduce...
2020-01-29 Claire WolfMerge pull request #1665 from YosysHQ/clifford/edifkeep
2020-01-29 Claire WolfMerge pull request #1659 from YosysHQ/clifford/experimental
2020-01-29 N. EngelhardtMerge pull request #1510 from pumbor/master
2020-01-29 Miodrag MilanovićMerge pull request #1559 from YosysHQ/efinix_test_fix
2020-01-28 Eddie HungMerge remote-tracking branch 'origin/master' into eddie...
2020-01-28 Eddie HungMerge pull request #1660 from YosysHQ/eddie/abc9_unperm...
2020-01-28 Eddie HungAdd and use SigSpec::reverse()
2020-01-28 Claire WolfMerge pull request #1567 from YosysHQ/eddie/sat_init_wa...
2020-01-28 N. EngelhardtMerge pull request #1573 from YosysHQ/eddie/xilinx_tristate
2020-01-28 Claire WolfMerge pull request #1553 from whitequark/manual-dffx
2020-01-27 Eddie Hungxilinx/ice40/ecp5: undo permuting LUT masks in lut_map
2020-01-27 Eddie HungMerge pull request #1619 from YosysHQ/eddie/abc9_refactor
2020-01-27 Eddie HungMerge branch 'eddie/abc9_refactor' into eddie/abc9_required
2020-01-27 Eddie HungMerge remote-tracking branch 'origin/master' into eddie...
2020-01-27 Eddie Hungverific: no help() when no YOSYS_ENABLE_VERIFIC
2020-01-27 Eddie Hungverific: also unflatten for 'hierarchy' flow as per...
2020-01-27 Claire WolfMerge pull request #1613 from porglezomp-misc/version...
2020-01-24 Eddie Hungread_aiger: set abc9_box_seq attr
2020-01-24 Eddie Hungverific: unflatten struct ports
2020-01-22 Eddie Hungread_aiger: also parse abc9_mergeability
2020-01-22 Eddie HungMerge remote-tracking branch 'origin/eddie/abc9_fixes...
2020-01-22 Eddie HungMerge remote-tracking branch 'origin/master' into eddie...
2020-01-21 Eddie Hungread_aiger: discard LUT inputs with nodeID == 0; not < 2
2020-01-21 Eddie Hungread_aiger: ignore constant inputs on LUTs
2020-01-21 Claire WolfMerge pull request #1637 from YosysHQ/mwk/fix-1634
2020-01-21 Claire WolfMerge pull request #1629 from YosysHQ/mwk/edif-z
2020-01-20 Claire WolfMerge pull request #1621 from YosysHQ/clifford/fminit
2020-01-19 David Shahast: Add support for $sformatf system function
2020-01-18 David ShahMerge pull request #1602 from niklasnisbeth/ice40-init...
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