Merge pull request #897 from trcwm/libertyfixes
[yosys.git] / frontends /
2019-03-22 Clifford WolfMerge pull request #889 from YosysHQ/clifford/fix888
2019-03-21 Clifford WolfFix mem2reg handling of memories with upto data ports...
2019-03-21 Clifford WolfImprove "read_verilog -dump_vlog[12]" handling of upto...
2019-03-21 Clifford WolfImprove read_verilog debug output capabilities
2019-03-19 Eddie HungMerge pull request #808 from eddiehung/read_aiger
2019-03-19 Eddie HungMerge https://github.com/YosysHQ/yosys into read_aiger
2019-03-19 Eddie HungAdd author name
2019-03-19 Clifford WolfMerge pull request #884 from zachjs/master
2019-03-19 Zachary Snowfix local name resolution in prefix constructs
2019-03-14 Clifford WolfMerge pull request #872 from YosysHQ/clifford/pmuxfix
2019-03-14 Clifford WolfImprove handling of "full_case" attributes
2019-03-14 Clifford WolfMerge pull request #869 from cr1901/win-shell
2019-03-13 Clifford WolfMerge pull request #868 from YosysHQ/clifford/fixmem
2019-03-12 Clifford WolfMerge pull request #866 from YosysHQ/clifford/idstuff
2019-03-12 Clifford WolfImprove handling of memories used in mem index expressi...
2019-03-12 Clifford WolfRemove outdated "blocking assignment to memory" warning
2019-03-12 Clifford WolfOnly set MEM2REG_FL_CONST_LHS/MEM2REG_FL_VAR_LHS for...
2019-03-11 Eddie HungMerge pull request #864 from YosysHQ/svalabelfix
2019-03-10 Clifford WolfFix handling of cases that look like sva labels, fixes...
2019-03-09 Clifford WolfMerge pull request #859 from smunaut/ice40_braminit
2019-03-09 Clifford WolfMerge pull request #858 from YosysHQ/clifford/svalabels
2019-03-09 Clifford WolfMerge pull request #861 from YosysHQ/verific_chparam
2019-03-09 Clifford WolfAlso add support for labels on sva module items, fixes...
2019-03-09 Eddie HungUpdate help message for -chparam
2019-03-09 Eddie HungAdd -chparam option to verific command
2019-03-09 Eddie HungFix spelling
2019-03-08 Clifford WolfMerge branch 'master' of github.com:YosysHQ/yosys
2019-03-08 Clifford WolfFix handling of task output ports in clocked always...
2019-03-07 Clifford WolfAdd support for SVA labels in read_verilog
2019-03-07 Clifford WolfAdd hack for handling SVA labels via Verific
2019-03-05 Clifford WolfMerge pull request #842 from litghost/merge_upstream
2019-03-05 Clifford WolfMerge pull request #850 from daveshah1/ecp5_warn_conflict
2019-03-03 Clifford WolfMerge pull request #848 from YosysHQ/clifford/fix763
2019-03-03 Clifford WolfMerge pull request #849 from YosysHQ/clifford/dynports
2019-03-02 Clifford WolfOnly run derive on blackbox modules when ports have...
2019-03-02 Clifford WolfFix error for wire decl in always block, fixes #763
2019-03-02 Clifford WolfFix $global_clock handling vs autowire
2019-03-02 Clifford WolfMerge pull request #847 from YosysHQ/clifford/fix785
2019-03-02 Clifford WolfFix $readmem[hb] for mem2reg memories, fixes #785
2019-03-02 Clifford WolfMerge pull request #843 from YosysHQ/clifford/mem2regco...
2019-03-01 Clifford WolfUse mem2reg on memories that only have constant-index...
2019-03-01 Clifford WolfImprove "read" error msg
2019-02-28 Clifford WolfMerge pull request #794 from daveshah1/ecp5improve
2019-02-24 Clifford WolfMerge pull request #812 from ucb-bar/arrayhierarchyfixes
2019-02-24 Clifford WolfMerge pull request #824 from litghost/fix_reduce_on_ff
2019-02-24 Clifford WolfFix handling of defparam for when default_nettype is...
2019-02-24 Clifford WolfCheck if Verific was built with DB_PRESERVE_INITIAL_VALUE
2019-02-22 Clifford WolfMerge pull request #819 from YosysHQ/clifford/optd
2019-02-22 Clifford WolfMerge pull request #820 from YosysHQ/clifford/fix810
2019-02-22 Clifford WolfMerge pull request #740 from daveshah1/improve_dress
2019-02-21 Clifford WolfFixes related to handling of autowires and upto-ranges...
2019-02-21 Clifford WolfFix handling of expression width in $past, fixes #810
2019-02-21 Clifford WolfFix segfault in printing of some internal error messages
2019-02-19 Eddie HungMerge branch 'master' into read_aiger
2019-02-19 Eddie HungFix for using POSIX basename
2019-02-18 Eddie HungMissing OSX headers?
2019-02-18 Eddie HungMerge branch 'dff_init' into read_aiger
2019-02-17 Eddie Hungread_aiger to ignore line after ands for ascii, not...
2019-02-17 Eddie HungMerge branch 'dff_init' into read_aiger
2019-02-17 Eddie HungMerge https://github.com/YosysHQ/yosys into dff_init
2019-02-17 Eddie HungMerge https://github.com/YosysHQ/yosys into read_aiger
2019-02-17 Clifford WolfMerge branch 'master' of github.com:YosysHQ/yosys into...
2019-02-13 Clifford WolfFix sign handling of real constants
2019-02-12 Eddie HungMerge branch 'read_aiger' of github.com:eddiehung/yosys...
2019-02-12 Eddie HungUse module->add{Not,And}Gate() functions
2019-02-11 Eddie HungDo not break for constraints
2019-02-11 Eddie HungNo increment line_count for binary ANDs
2019-02-11 Eddie HungDo not ignore newline after AND in binary AIG
2019-02-08 Eddie HungMerge remote-tracking branch 'origin/dff_init' into...
2019-02-08 Eddie HungaddDff -> addDffGate as per @daveshah1
2019-02-08 Eddie HungFix tabulation
2019-02-08 Eddie Hung-module_name arg to go before -clk_name
2019-02-08 Eddie HungAdd missing "[options]" to read_blif help
2019-02-08 Eddie HungAllow module name to be determined by argument too
2019-02-08 Eddie HungRefactor into AigerReader class
2019-02-08 Eddie HungParse binary AIG files
2019-02-08 Eddie HungRefactor to parse_aiger_header()
2019-02-08 Eddie HungAdd comment
2019-02-08 Eddie HungHandle reset logic in latches
2019-02-08 Eddie HungChange literal vars from int to unsigned
2019-02-08 Eddie HungCreate clk outside of latch loop
2019-02-08 Eddie HungHandle latch symbols too
2019-02-08 Eddie HungRemove return after log_error
2019-02-08 Eddie HungAdd support for symbol tables
2019-02-08 Eddie HungStub for binary AIGER
2019-02-06 Eddie HungRefactor
2019-02-06 Eddie HungMerge branch 'dff_init' of https://github.com/eddiehung...
2019-02-06 Eddie HungWIP
2019-01-07 Clifford WolfMerge pull request #782 from whitequark/flowmap_dfs
2019-01-06 Clifford WolfMerge pull request #780 from phire/rename_from_wire
2019-01-05 Clifford WolfBugfix in Verilog string handling
2019-01-04 Clifford WolfMerge pull request #777 from mmicko/achronix_cell_sim_fix
2019-01-04 Clifford WolfRemove -m32 Verific eval lib build instructions
2019-01-02 Clifford WolfMerge pull request #770 from whitequark/opt_expr_cmp
2019-01-02 Clifford WolfMerge pull request #755 from Icenowy/anlogic-dram-init
2019-01-02 Clifford WolfMerge branch 'master' of github.com:YosysHQ/yosys
2019-01-02 Clifford WolfMerge pull request #750 from Icenowy/anlogic-ff-init
2019-01-02 Clifford WolfMerge pull request #773 from whitequark/opt_lut_elim_fixes
2019-01-02 Clifford WolfMerge pull request #772 from whitequark/synth_lut
2019-01-02 Clifford WolfMerge pull request #771 from whitequark/techmap_cmp2lut
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