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Add {get,set}_src_attribute() methods on RTLIL::AttrObject
[yosys.git] / frontends /
2017-08-15 Clifford WolfMerge branch 'rmports' of https://github.com/azonenberg... tree | commitdiff
2017-08-14 Clifford WolfMerge pull request #381 from azonenberg/countfix tree | commitdiff
2017-08-14 Clifford WolfMerge pull request #383 from azonenberg/abcfnames tree | commitdiff
2017-08-14 Clifford WolfMerge pull request #382 from azonenberg/jsoniofix tree | commitdiff
2017-08-14 Robert Oujson: Parse inout correctly rather than as an output tree | commitdiff
2017-07-28 Clifford WolfAdd merging of "past FFs" to verific importer tree | commitdiff
2017-07-28 Clifford WolfAdd minimal support for PSL in VHDL via Verific tree | commitdiff
2017-07-28 Clifford WolfImprove Verific HDL language options tree | commitdiff
2017-07-28 Clifford WolfFix handling of non-user-declared Verific netbus tree | commitdiff
2017-07-27 Clifford WolfImprove Verific SVA importer tree | commitdiff
2017-07-27 Clifford WolfAdd log_warning_noprefix() API, Use for Verific warning... tree | commitdiff
2017-07-27 Clifford WolfAdd "verific -import -n" and "verific -import -nosva" tree | commitdiff
2017-07-27 Clifford WolfImprove Verific SVA import: negedge and $past tree | commitdiff
2017-07-27 Clifford WolfImprove Verific SVA importer tree | commitdiff
2017-07-26 Clifford WolfImprove Verific bindings (mostly related to SVA) tree | commitdiff
2017-07-25 Clifford WolfImprove "help verific" message tree | commitdiff
2017-07-25 Clifford WolfAdd "verific -extnets" tree | commitdiff
2017-07-25 Clifford WolfImprove "verific -all" handling tree | commitdiff
2017-07-24 Clifford WolfAdd "verific -import -d <dump_file" tree | commitdiff
2017-07-24 Clifford WolfAdd "verific -import -flatten" and "verific -import -v" tree | commitdiff
2017-07-22 Clifford WolfAdd "verific -import -k" tree | commitdiff
2017-07-22 Clifford WolfImprove docs for verific bindings, add simply sby example tree | commitdiff
2017-07-21 Clifford WolfFix "read_blif -wideports" handling of cells with wide... tree | commitdiff
2017-07-21 Clifford WolfAdd a paragraph about pre-defined macros to read_verilo... tree | commitdiff
2017-07-10 Clifford WolfAdd attributes and parameter support to JSON front-end tree | commitdiff
2017-07-08 Clifford WolfAdd JSON front-end tree | commitdiff
2017-07-04 Clifford WolfAdd Verific Release information to log tree | commitdiff
2017-06-07 Clifford WolfFix generation of vlogtb output in yosys-smtbmc for... tree | commitdiff
2017-06-01 Clifford WolfFix handling of Verilog ~& and ~| operators tree | commitdiff
2017-04-30 Clifford WolfAdd support for localparam in module header tree | commitdiff
2017-04-26 Clifford WolfAdd support for `resetall compiler directive tree | commitdiff
2017-03-14 Clifford WolfFix verilog pre-processor for multi-level relative... tree | commitdiff
2017-03-01 Clifford WolfAllow $anyconst, etc. in non-formal SV mode tree | commitdiff
2017-02-25 Clifford WolfMerge branch 'master' of https://github.com/klammerj... tree | commitdiff
2017-02-25 Clifford WolfMerge branch 'master' of github.com:cliffordwolf/yosys tree | commitdiff
2017-02-25 Clifford WolfAdd $live and $fair cell types, add support for s_event... tree | commitdiff
2017-02-24 Andrew ZonenbergMerge https://github.com/cliffordwolf/yosys tree | commitdiff
2017-02-23 Clifford WolfAdd support for SystemVerilog unique, unique0, and... tree | commitdiff
2017-02-23 Clifford WolfPreserve string parameters tree | commitdiff
2017-02-23 Clifford WolfAdded SystemVerilog support for ++ and -- tree | commitdiff
2017-02-14 Andrew ZonenbergMerge https://github.com/cliffordwolf/yosys tree | commitdiff
2017-02-14 Clifford WolfFix incorrect "incompatible re-declaration of wire... tree | commitdiff
2017-02-11 Andrew ZonenbergMerge https://github.com/cliffordwolf/yosys tree | commitdiff
2017-02-11 Clifford WolfAdd support for verific mem initialization tree | commitdiff
2017-02-11 Clifford WolfFix another stupid bug in the same line tree | commitdiff
2017-02-11 Clifford WolfAdd verific support for initialized variables tree | commitdiff
2017-02-11 Clifford WolfImprove handling of Verific warnings and error messages tree | commitdiff
2017-02-11 Clifford WolfFix extremely stupid typo tree | commitdiff
2017-02-11 Clifford WolfMerge branch 'master' of https://github.com/stv0g/yosys... tree | commitdiff
2017-02-09 Clifford WolfAdd checker support to verilog front-end tree | commitdiff
2017-02-09 Clifford WolfAdd "rand" and "rand const" verific support tree | commitdiff
2017-02-09 Andrew ZonenbergMerge https://github.com/cliffordwolf/yosys tree | commitdiff
2017-02-08 Clifford WolfAdd SV "rand" and "const rand" support tree | commitdiff
2017-02-08 Clifford WolfAdd PSL parser mode to verific front-end tree | commitdiff
2017-02-06 Clifford WolfAdd "read_blif -wideports" tree | commitdiff
2017-02-04 Clifford WolfFurther improve cover() support tree | commitdiff
2017-02-04 Clifford WolfAdd $cover cell type and SVA cover() support tree | commitdiff
2017-02-04 Clifford WolfAdd assert/assume support to verific front-end tree | commitdiff
2017-01-31 Clifford WolfMerge branch 'opt_compare_pr' of https://github.com... tree | commitdiff
2017-01-26 Clifford WolfMerge branch 'master' of github.com:cliffordwolf/yosys tree | commitdiff
2017-01-17 Clifford WolfAdd "enum" and "typedef" lexer support tree | commitdiff
2017-01-15 Andrew ZonenbergMerge https://github.com/cliffordwolf/yosys tree | commitdiff
2017-01-15 Clifford WolfFix bug in AstNode::mem2reg_as_needed_pass2() tree | commitdiff
2017-01-05 Andrew ZonenbergMerge https://github.com/cliffordwolf/yosys tree | commitdiff
2017-01-05 Clifford WolfFixed handling of local memories in functions tree | commitdiff
2017-01-04 Clifford WolfAdded handling of local memories and error for local... tree | commitdiff
2017-01-03 Clifford WolfAdded Verilog $rtoi and $itor support tree | commitdiff
2016-12-23 Andrew ZonenbergMerge pull request #1 from azonenberg-hk/master tree | commitdiff
2016-12-17 Andrew ZonenbergMerge https://github.com/cliffordwolf/yosys tree | commitdiff
2016-12-15 Clifford WolfAdded "verilog_defines" command tree | commitdiff
2016-11-28 Clifford WolfAdded support for macros as include file names tree | commitdiff
2016-11-28 Clifford WolfBugfix in "read_verilog -D NAME=VAL" handling tree | commitdiff
2016-11-15 Clifford WolfAdded support for hierarchical defparams tree | commitdiff
2016-11-15 Clifford WolfRemember global declarations and defines accross read_v... tree | commitdiff
2016-11-04 Clifford WolfFixed anonymous genblock object names tree | commitdiff
2016-11-01 Clifford WolfSome fixes in handling of signed arrays tree | commitdiff
2016-10-22 Clifford WolfAdded avail params to ilang format, check module params... tree | commitdiff
2016-10-19 Clifford WolfNo limit for length of lines in BLIF front-end tree | commitdiff
2016-10-14 Clifford WolfAdded $anyseq cell type tree | commitdiff
2016-10-14 Clifford WolfAdded $global_clock verilog syntax support for creating... tree | commitdiff
2016-10-11 Clifford WolfAdded $ff and $_FF_ cell types tree | commitdiff
2016-09-23 Clifford WolfAdded liberty parser support for types within cell... tree | commitdiff
2016-09-23 Clifford WolfMerge branch 'master' of https://github.com/brouhaha... tree | commitdiff
2016-09-18 Clifford WolfAdded $past, $stable, $rose, $fell SVA functions tree | commitdiff
2016-09-18 Clifford WolfAdded support for bus interfaces to "read_liberty ... tree | commitdiff
2016-09-06 Clifford WolfAdded assertpmux tree | commitdiff
2016-09-06 Clifford WolfBugfix in parsing of BLIF latch init values tree | commitdiff
2016-09-06 Clifford WolfAvoid creation of bogus initial blocks for assert/assum... tree | commitdiff
2016-08-30 Clifford WolfAdded $anyconst support to yosys-smtbmc tree | commitdiff
2016-08-30 Clifford WolfRemoved $aconst cell type tree | commitdiff
2016-08-28 Clifford WolfRemoved $predict again tree | commitdiff
2016-08-26 Clifford WolfMerge branch 'master' of github.com:cliffordwolf/yosys tree | commitdiff
2016-08-26 Clifford WolfMerge pull request #215 from frznchckn/to_upstream tree | commitdiff
2016-08-26 Clifford WolfAdded read_verilog -norestrict -assume-asserts tree | commitdiff
2016-08-25 Clifford WolfImproved verilog parser errors tree | commitdiff
2016-08-24 Clifford WolfAdded SV "restrict" keyword tree | commitdiff
2016-08-22 Clifford WolfFixed bug with memories that do not have a down-to... tree | commitdiff
2016-08-21 Clifford WolfAnother bugfix in mem2reg code tree | commitdiff
2016-08-21 Clifford WolfMinor improvements to AstNode::dumpAst() and AstNode... tree | commitdiff
2016-08-20 Clifford WolfFixed finish_addr handling in $readmemh/$readmemb tree | commitdiff
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