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Various improvements in xsthammer report generator
[yosys.git] / frontends /
2013-07-04 Clifford WolfAdded defparam support to Verilog/AST frontend tree | commitdiff
2013-06-13 Clifford WolfMore fixes for bugs found using xsthammer tree | commitdiff
2013-06-11 Clifford WolfFurther improved and extended xsthammer tree | commitdiff
2013-06-10 Clifford WolfSign-extension related fixes in SatGen and AST frontend tree | commitdiff
2013-06-10 Clifford WolfFixes and improvements in AST const folding tree | commitdiff
2013-06-10 Clifford WolfEnabled AST/Verilog front-end optimizations per default tree | commitdiff
2013-06-07 Clifford WolfAdded SAT generator and simple sat_solve command tree | commitdiff
2013-05-24 Clifford WolfAdded log_assert() api tree | commitdiff
2013-05-23 Clifford WolfFixed memory leak in ilang frontend tree | commitdiff
2013-05-19 Clifford WolfMerge pull request #6 from hansiglaser/master tree | commitdiff
2013-05-19 Johann Glaseradded option '-Dname[=definition]' to command 'read_ver... tree | commitdiff
2013-05-16 Clifford WolfMerge branch 'master' of github.com:cliffordwolf/yosys tree | commitdiff
2013-05-16 Clifford WolfMerge branch 'bugfix' tree | commitdiff
2013-05-16 Clifford WolfFixed synthesis of functions in latched blocks tree | commitdiff
2013-05-07 Clifford WolfAdded support for verilog === operator tree | commitdiff
2013-04-26 Clifford WolfFixed handling of positional module parameters tree | commitdiff
2013-04-26 Clifford WolfOnly use sha1 checksums for names of parametric modules... tree | commitdiff
2013-04-13 Clifford WolfFixed a bug in AST frontend for cases with non-blocking... tree | commitdiff
2013-03-31 Clifford WolfNow only use value from "initial" when no matching... tree | commitdiff
2013-03-31 Clifford WolfAdded AST_INITIAL (before verilog "initial" was mapped... tree | commitdiff
2013-03-28 Clifford WolfImplemented proper handling of stub placeholder modules tree | commitdiff
2013-03-26 Clifford WolfImprovements and bugfixes for generate blocks with... tree | commitdiff
2013-03-26 Clifford WolfFixed handling of unconditional generate blocks tree | commitdiff
2013-03-25 Clifford WolfAdded nosync attribute and some async reset related... tree | commitdiff
2013-03-24 Clifford WolfAdded mem2reg option to verilog frontend tree | commitdiff
2013-03-24 Clifford WolfAnother fix in mem2reg ast simplify logic tree | commitdiff
2013-03-24 Clifford WolfImproved mem2reg handling in ast simplifier tree | commitdiff
2013-03-23 Clifford WolfTiny fixes to verilog parser tree | commitdiff
2013-03-01 Clifford WolfAdded help messages to ilang and verilog frontends tree | commitdiff
2013-02-27 Clifford WolfMoved stand-alone libs to libs/ directory and added... tree | commitdiff
2013-02-26 Clifford WolfAdded support for verilog genblock[index].member syntax tree | commitdiff
2013-01-16 Clifford WolfAdded support for "always @(*)" tree | commitdiff
2013-01-05 Clifford Wolfadded .gitignore files tree | commitdiff
2013-01-05 Clifford Wolfinitial import tree | commitdiff