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Generalized blifparse API
[yosys.git]
/
frontends
/
2015-05-17
Clifford Wolf
Generalized blifparse API
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commitdiff
2015-05-17
Clifford Wolf
abc/blifparse files reorganization
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commitdiff
2015-05-17
Clifford Wolf
Verific build fixes
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commitdiff
2015-04-19
Clifford Wolf
Verilog front-end: define `BLACKBOX in -lib mode
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commitdiff
2015-04-03
Ahmed Irfan
Merge branch 'master' of https://github.com/cliffordwol...
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commitdiff
2015-03-25
Clifford Wolf
Ignore celldefine directive in verilog front-end
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commitdiff
2015-03-01
Clifford Wolf
Const-fold parameter defs on-demand in AstNode::detectS...
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commitdiff
2015-02-26
Clifford Wolf
Added non-std verilog assume() statement
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commitdiff
2015-02-20
Clifford Wolf
Added deep recursion warning to AST simplify
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commitdiff
2015-02-20
Clifford Wolf
Parser support for complex delay expressions
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commitdiff
2015-02-19
Clifford Wolf
YosysJS stuff
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commitdiff
2015-02-18
Clifford Wolf
Convert floating point cell parameters to strings
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commitdiff
2015-02-14
Clifford Wolf
Various fixes for memories with offsets
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commitdiff
2015-02-14
Clifford Wolf
Added "read_verilog -nomeminit" and "nomeminit" attribute
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commitdiff
2015-02-14
Clifford Wolf
Creating $meminit cells in verilog front-end
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commitdiff
2015-02-14
Clifford Wolf
Fixed handling of "//" in filenames in verilog pre...
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commitdiff
2015-02-13
Clifford Wolf
Added AstNode::simplify() recursion counter
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commitdiff
2015-02-10
Clifford Wolf
Improved read_verilog support for empty behavioral...
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commitdiff
2015-02-07
Clifford Wolf
Ignore explicit assignments to constants in HDL code
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commitdiff
2015-02-07
Clifford Wolf
Fixed a bug with autowire bit size
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commitdiff
2015-01-24
Clifford Wolf
Added ENABLE_NDEBUG makefile options
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commitdiff
2015-01-15
Clifford Wolf
Ignoring more system task and functions
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commitdiff
2015-01-15
Clifford Wolf
Fixed handling of "input foo; reg [0:0] foo;"
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commitdiff
2015-01-15
Clifford Wolf
Consolidate "Blocking assignment to memory.." msgs...
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commitdiff
2015-01-08
Clifford Wolf
Merge pull request #46 from utzig/master
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commitdiff
2015-01-08
Fabio Utzig
Enable bison to be customized
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commitdiff
2015-01-02
Clifford Wolf
Define YOSYS and SYNTHESIS in preproc
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commitdiff
2015-01-01
Clifford Wolf
Fixed memory->start_offset handling
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commitdiff
2014-12-29
Clifford Wolf
Added global yosys_celltypes
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commitdiff
2014-12-29
Clifford Wolf
dict/pool changes in ast
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commitdiff
2014-12-28
Clifford Wolf
Changed more code to dict<> and pool<>
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commitdiff
2014-12-27
Clifford Wolf
Improved some warning messages
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commitdiff
2014-12-27
Clifford Wolf
Fixed mem2reg warning message
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commitdiff
2014-12-26
Clifford Wolf
Added Yosys::{dict,nodict,vector} container types
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commitdiff
2014-12-24
Clifford Wolf
Renamed extend() to extend_xx(), changed most users...
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commitdiff
2014-12-11
Clifford Wolf
Fixed supply0/supply1 with many wires
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commitdiff
2014-11-24
Clifford Wolf
Fixed minor bug in parsing delays
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commitdiff
2014-11-24
Clifford Wolf
Fixed two minor bugs in constant parsing
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commitdiff
2014-11-14
Clifford Wolf
Added warning for use of 'z' constants in HDL
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commitdiff
2014-11-12
Clifford Wolf
Fixed parsing of nested verilog concatenation and replicate
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commitdiff
2014-11-09
Clifford Wolf
Added log_warning() API
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commitdiff
2014-11-08
Clifford Wolf
Added "ENABLE_PLUGINS := 0" to verific amd64 build...
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commitdiff
2014-10-30
Clifford Wolf
Fixed parsing of "module mymod #( parameter foo = 1...
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commitdiff
2014-10-29
Clifford Wolf
AST simplifier: optimize constant AST_CASE nodes before...
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commitdiff
2014-10-27
Clifford Wolf
Added support for task and function args in parentheses
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commitdiff
2014-10-26
Clifford Wolf
Improvements in $readmem[bh] implementation
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commitdiff
2014-10-26
Clifford Wolf
Added support for $readmemh/$readmemb
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commitdiff
2014-10-25
Clifford Wolf
Fixed constant "cond ? string1 : string2" with strings...
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commitdiff
2014-10-23
Clifford Wolf
Re-introduced Yosys::readsome() helper function
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commitdiff
2014-10-19
Clifford Wolf
minor indenting corrections
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commitdiff
2014-10-19
Clifford Wolf
Merge pull request #40 from parvizp/compile_mac_10.9.2
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commitdiff
2014-10-19
Parviz Palangpour
Builds on Mac 10.9.2 with LLVM 3.5.
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commitdiff
2014-10-18
Clifford Wolf
Fixed various VS warnings
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commitdiff
2014-10-17
William Speirs
Header changes so it will compile on VS
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commitdiff
2014-10-17
William Speirs
Wrapped math in int constructor
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commitdiff
2014-10-16
Clifford Wolf
Print "SystemVerilog" in "read_verilog -sv" log messages
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commitdiff
2014-10-15
Clifford Wolf
Fixed handling of invalid array access in mem2reg code
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commitdiff
2014-10-14
Clifford Wolf
Merge branch 'win32'
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commitdiff
2014-10-14
Clifford Wolf
Updated .gitignore file for ilang and verilog frontends
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commitdiff
2014-10-14
Clifford Wolf
Replaced readsome() with read() and gcount()
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commitdiff
2014-10-14
William Speirs
Updated lexers & parsers to include prefixes
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commitdiff
2014-10-12
Clifford Wolf
Added make_temp_{file,dir}() and remove_directory(...
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commitdiff
2014-10-12
Clifford Wolf
Added run_command() api to replace system() and popen()
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commitdiff
2014-10-11
Clifford Wolf
Do not the 'z' modifier in format string (another win32...
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commitdiff
2014-10-11
Clifford Wolf
Fixed win32 troubles with f.readsome()
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commitdiff
2014-10-11
Clifford Wolf
Disabled vhdl2verilog command for win32 builds
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commitdiff
2014-10-10
Clifford Wolf
Added format __attribute__ to stringf()
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commitdiff
2014-10-10
Clifford Wolf
Renamed SIZE() to GetSize() because of name collision...
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commitdiff
2014-09-27
Clifford Wolf
namespace Yosys
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commitdiff
2014-09-22
Ahmed Irfan
Merge branch 'master' of https://github.com/cliffordwol...
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commitdiff
2014-09-08
Clifford Wolf
Another $clog2 bugfix
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commitdiff
2014-09-06
Clifford Wolf
Fixed $clog2 (off by one error)
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commitdiff
2014-09-06
Clifford Wolf
Fixed assignment of out-of bounds array element
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commitdiff
2014-09-06
Clifford Wolf
Merge branch 'master' of github.com:cliffordwolf/yosys
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commitdiff
2014-09-06
Clifford Wolf
Merge pull request #38 from rubund/master
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commitdiff
2014-09-06
Ruben Undheim
Corrected spelling mistakes found by lintian
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commitdiff
2014-09-04
Clifford Wolf
Removed $bu0 cell type
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commitdiff
2014-08-23
Clifford Wolf
Removed compatbility.{h,cc}: Not using open_memstream...
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commitdiff
2014-08-23
Clifford Wolf
Changed frontend-api from FILE to std::istream
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commitdiff
2014-08-22
Clifford Wolf
Added emscripten (emcc) support to build system and...
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commitdiff
2014-08-22
Clifford Wolf
Added support for non-standard <plugin>:<c_name> DPI...
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commitdiff
2014-08-22
Clifford Wolf
Archibald Rust and Clifford Wolf: ffi-based dpi_call()
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commitdiff
2014-08-21
Clifford Wolf
Fixed small memory leak in ast simplify
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commitdiff
2014-08-21
Clifford Wolf
Added support for DPI function with different names...
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commitdiff
2014-08-21
Clifford Wolf
Added AstNode::asInt()
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commitdiff
2014-08-21
Clifford Wolf
Fixed memory leak in DPI function calls
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commitdiff
2014-08-21
Clifford Wolf
Merge branch 'master' of github.com:cliffordwolf/yosys
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commitdiff
2014-08-21
Clifford Wolf
Added Verilog/AST support for DPI functions (dpi_call...
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commitdiff
2014-08-21
Clifford Wolf
Added support for global tasks and functions
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commitdiff
2014-08-18
Clifford Wolf
Added "via_celltype" attribute on task/func
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commitdiff
2014-08-17
Clifford Wolf
Added const folding of AST_CASE to AST simplifier
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commitdiff
2014-08-17
Clifford Wolf
Improved AST ProcessGenerator performance
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commitdiff
2014-08-16
Clifford Wolf
Use stackmap<> in AST ProcessGenerator
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commitdiff
2014-08-16
Clifford Wolf
Added module->uniquify()
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commitdiff
2014-08-16
Clifford Wolf
AST ProcessGenerator: replaced subst_*_{from,to} with...
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commitdiff
2014-08-15
Clifford Wolf
Renamed $_INV_ cell type to $_NOT_
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commitdiff
2014-08-14
Clifford Wolf
Fixed bug in "read_verilog -ignore_redef"
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commitdiff
2014-08-14
Clifford Wolf
Added RTLIL::SigSpec::to_sigbit_map()
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commitdiff
2014-08-14
Clifford Wolf
Changed the AST genWidthRTLIL subst interface to use...
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commitdiff
2014-08-14
Clifford Wolf
Fixed line numbers when using here-doc macros
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