Add "scratchpad" to CHANGELOG
[yosys.git] / frontends /
2019-12-18 Eddie HungMerge branch 'master' of github.com:YosysHQ/yosys
2019-12-18 David ShahMerge pull request #1563 from YosysHQ/dave/async-prld
2019-12-18 Eddie HungMerge pull request #1572 from nakengelhardt/scratchpad_pass
2019-12-18 Clifford WolfSend people to symbioticeda.com instead of verific.com
2019-12-17 Eddie HungMerge pull request #1574 from YosysHQ/eddie/xilinx_lutram
2019-12-16 Eddie HungMerge branch 'diego/memattr' of https://github.com...
2019-12-16 Eddie HungMerge pull request #1575 from rodrigomelo9/master
2019-12-16 Eddie HungMerge pull request #1577 from gromero/for-yosys
2019-12-13 Rodrigo Alejandro... Fixed some missing "verilog_" in documentation
2019-12-12 Diego HMerge https://github.com/YosysHQ/yosys into bram_xilinx
2019-12-11 David ShahMerge pull request #1564 from ZirconiumX/intel_housekeeping
2019-12-10 Eddie HungMerge pull request #1545 from YosysHQ/eddie/ice40_wrapc...
2019-12-05 Clifford WolfMerge pull request #1551 from whitequark/manual-cell...
2019-12-04 whitequarkkernel: require \B_SIGNED=0 on $shl, $sshl, $shr, ...
2019-12-03 Clifford WolfMerge pull request #1524 from pepijndevos/gowindffinit
2019-12-02 David ShahMerge pull request #1542 from YosysHQ/dave/abc9-loop-fix
2019-12-02 Clifford WolfMerge pull request #1539 from YosysHQ/mwk/ilang-bounds...
2019-11-27 Marcin Kościelnickiread_ilang: do bounds checking on bit indices
2019-11-27 Clifford WolfMerge pull request #1501 from YosysHQ/dave/mem_copy_attr
2019-11-22 Clifford WolfMerge pull request #1517 from YosysHQ/clifford/optmem
2019-11-22 Clifford WolfMerge pull request #1515 from YosysHQ/clifford/svastuff
2019-11-22 Clifford WolfAdd Verific support for SVA nexttime properties
2019-11-22 Clifford WolfImprove handling of verific primitives in "verific...
2019-11-22 Clifford WolfAdd Verific SVA support for "always" properties
2019-11-22 Clifford WolfMerge pull request #1511 from YosysHQ/dave/always
2019-11-21 David Shahsv: Correct parsing of always_comb, always_ff and alway...
2019-11-20 Clifford WolfMerge pull request #1507 from YosysHQ/clifford/verificfixes
2019-11-20 Clifford WolfCorrectly treat empty modules as blackboxes in Verific
2019-11-20 Clifford WolfDo not rename VHDL entities to "entity(impl)" when...
2019-11-14 Clifford WolfMerge pull request #1444 from btut/feature/python_wrapp...
2019-11-14 Clifford WolfMerge pull request #1465 from YosysHQ/dave/ice40_timing_sim
2019-11-11 Pepijn de VosMerge branch 'master' of https://github.com/YosysHQ...
2019-11-10 Clifford WolfMerge pull request #1470 from YosysHQ/clifford/subpassdoc
2019-11-07 Clifford WolfAdd check for valid macro names in macro definitions
2019-10-27 Clifford WolfMerge pull request #1393 from whitequark/write_verilog...
2019-10-24 Clifford WolfImprove naming scheme for (VHDL) modules imported from...
2019-10-24 David ShahMerge pull request #1455 from YosysHQ/dave/ultrascaleplus
2019-10-24 Clifford WolfAdd "verific -L"
2019-10-22 Clifford WolfMerge pull request #1452 from nakengelhardt/fix_dsp_mem_reg
2019-10-21 Clifford WolfAdd "verilog_defines -list" and "verilog_defines -reset"
2019-10-21 Clifford WolfFix handling of "restrict" in Verific front-end
2019-10-21 Pepijn de VosMerge branch 'master' of https://github.com/YosysHQ...
2019-10-18 Miodrag MilanovićMerge branch 'master' into mmicko/efinix
2019-10-18 Miodrag MilanovićMerge branch 'master' into mmicko/anlogic
2019-10-18 Miodrag MilanovićMerge branch 'master' into eddie/pr1352
2019-10-16 Clifford WolfFix parsing of .cname BLIF statements
2019-10-15 Clifford WolfAdd .blackbox support to blif front-end
2019-10-15 Benedikt TutzerMerge branch 'master' of https://github.com/YosysHQ...
2019-10-14 Clifford WolfMerge pull request #1448 from YosysHQ/daveshah1-sv...
2019-10-14 Clifford WolfUse "(id)" instead of "id" for types as temporary hack
2019-10-08 Eddie HungMerge pull request #1432 from YosysHQ/eddie/fix1427
2019-10-08 Eddie HungMerge pull request #1433 from YosysHQ/eddie/equiv_opt_a...
2019-10-08 Eddie HungMerge pull request #1437 from YosysHQ/eddie/abc_to_abc9
2019-10-08 Eddie HungMerge pull request #1438 from YosysHQ/eddie/xilinx_dsp_...
2019-10-06 Clifford WolfMerge pull request #1439 from YosysHQ/eddie/fix_ice40_w...
2019-10-05 Miodrag MilanovićMerge pull request #1436 from YosysHQ/mmicko/msvc_fix
2019-10-05 Eddie HungMerge branch 'master' into eddie/abc_to_abc9
2019-10-04 Eddie HungRename abc_* names/attributes to more precisely be...
2019-10-04 Miodrag MilanovicFixes for MSVC build
2019-10-04 Miodrag MilanovicMerge branch 'SergeyDegtyar/efinix' of https://github...
2019-10-04 Miodrag MilanovicMerge branch 'SergeyDegtyar/anlogic' of https://github...
2019-10-03 Clifford WolfMerge pull request #1419 from YosysHQ/eddie/lazy_derive
2019-10-03 Clifford WolfMerge pull request #1422 from YosysHQ/eddie/aigmap_select
2019-10-03 David Shahfrontends/ast: code style
2019-10-03 David Shahsv: Fix typedefs in blocks
2019-10-03 David Shahsv: Disambiguate interface ports
2019-10-03 David Shahsv: Fix memories of typedefs
2019-10-03 David Shahsv: Add %expect
2019-10-03 David Shahsv: Add support for memories of a typedef
2019-10-03 David Shahsv: Add support for memory typedefs
2019-10-03 David Shahsv: Fix typedefs in packages
2019-10-03 David Shahsv: Fix typedef parameters
2019-10-03 David Shahsv: Switch parser to glr, prep for typedef
2019-10-03 David ShahMerge pull request #1425 from YosysHQ/dave/ecp5_pdp16
2019-10-03 Eddie HungMerge pull request #1423 from YosysHQ/eddie/techmap_rep...
2019-10-01 Miodrag MilanovićMerge pull request #1426 from YosysHQ/mmicko/fix_environ
2019-10-01 Miodrag MilanovicDefine environ, fixes #1424
2019-10-01 SergeyMerge branch 'master' into SergeyDegtyar/efinix
2019-10-01 SergeyMerge branch 'master' into SergeyDegtyar/anlogic
2019-09-30 Eddie HungMerge branch 'SergeyDegtyar/ecp5' of https://github...
2019-09-30 Eddie HungFix for svinterfaces
2019-09-30 Eddie Hungmodule->derive() to be lazy and not touch ast if alread...
2019-09-30 whitequarkMerge pull request #1406 from whitequark/connect_rpc
2019-09-30 Eddie HungMerge pull request #1397 from btut/fix/python_wrappers_...
2019-09-30 whitequarkrpc: new frontend.
2019-09-30 Miodrag MilanovićMerge pull request #1416 from YosysHQ/mmicko/frontend_b...
2019-09-30 Clifford WolfMerge pull request #1412 from YosysHQ/eddie/equiv_opt_a...
2019-09-30 Eddie HungMerge pull request #1414 from hzeller/improve-replace...
2019-09-29 Eddie HungMerge pull request #1359 from YosysHQ/xc7dsp
2019-09-29 Miodrag MilanovicFix reading aig files on windows
2019-09-29 Miodrag MilanovicOpen aig frontend as binary file
2019-09-27 Aman GoelMerge pull request #7 from YosysHQ/master
2019-09-25 Eddie HungMerge pull request #1401 from SergeyDegtyar/SergeyDegty...
2019-09-24 Eddie HungForce $inout.out ports to begin with '$' to indicate...
2019-09-20 Eddie HungMerge remote-tracking branch 'origin/master' into xc7dsp
2019-09-20 Clifford WolfMerge pull request #1386 from YosysHQ/clifford/fix1360
2019-09-20 Clifford WolfFix handling of read_verilog config in AstModule::repro...
2019-09-18 Eddie HungMerge pull request #1355 from YosysHQ/eddie/peepopt_dff...
2019-09-18 Eddie HungMerge remote-tracking branch 'origin/master' into xc7dsp
2019-09-18 Eddie HungMerge pull request #1379 from mmicko/sim_models
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