2020-10-17 |
H.J. Lu | gas: Add a -gdwarf-5 debug_line test with .s file |
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2020-10-17 |
H.J. Lu | gas: Always use as_where for preprocessed assembly... |
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2020-10-16 |
H.J. Lu | gas: Reuse the input file entry in the file table |
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2020-10-16 |
Cui,Lili | Enhancement for avx-vnni patch |
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2020-10-14 |
H.J. Lu | x86: Support Intel AVX VNNI |
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2020-10-14 |
Lili Cui | x86: Add support for Intel HRESET instruction |
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2020-10-14 |
Lili Cui | x86: Support Intel UINTR |
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2020-10-09 |
H.J. Lu | x86: Support GNU_PROPERTY_X86_ISA_1_V[234] marker |
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2020-10-03 |
H.J. Lu | x86: Update register operand check for AddrPrefixOpReg |
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2020-09-24 |
Cui,Lili | Add support for Intel TDX instructions. |
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2020-09-23 |
Terry Guo | Enable support to Intel Keylocker instructions |
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2020-09-17 |
Alan Modra | Tidy gas i386.exp |
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2020-09-11 |
Mark Wielaard | gas: Don't error when .debug_line already exists, unles... |
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2020-07-30 |
H.J. Lu | x86: Add {disp16} pseudo prefix |
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2020-07-21 |
Jan Beulich | Revert "x86: Replace evex-no-scale.s with evex-no-scale... |
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2020-07-20 |
Jan Beulich | x86: handle SVR4 escaped binary operators |
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2020-07-20 |
Jan Beulich | x86: honor absolute section when emitting code |
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2020-07-20 |
Jan Beulich | ix86: enable more ELF tests for VxWorks |
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2020-07-14 |
Jan Beulich | x86: don't disassemble MOVBE with two suffixes |
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2020-07-14 |
Jan Beulich | x86: avoid attaching suffix to register-only CRC32 |
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2020-07-11 |
H.J. Lu | x86: Support GNU_PROPERTY_X86_FEATURE_2_TMM |
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2020-07-10 |
H.J. Lu | x86: Extract extended states from instruction template |
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2020-07-10 |
Lili Cui | x86: Add support for Intel AMX instructions |
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2020-07-09 |
H.J. Lu | x86: Properly set YMM/ZMM features |
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2020-07-08 |
Jan Beulich | x86: FMA4 scalar insns ignore VEX.L |
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2020-06-30 |
H.J. Lu | Remove x86 NaCl target support |
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2020-06-26 |
Jan Beulich | x86: fix processing of -M disassembler option |
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2020-06-25 |
Jan Beulich | x86: operand sizing prefixes can disambiguate insns |
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2020-06-09 |
Jan Beulich | x86-64: adjust far indirect branch handling |
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2020-06-09 |
Jan Beulich | x86: don't ignore mandatory pseudo prefixes |
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2020-06-08 |
Jan Beulich | x86: restrict use of register aliases |
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2020-04-26 |
liuhongt | Improve -mlfence-after-load |
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2020-04-07 |
Cui,Lili | Add support for intel TSXLDTRK instructions$ |
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2020-04-02 |
LiliCui | Add support for intel SERIALIZE instruction |
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2020-03-11 |
H.J. Lu | i386: Add tests for lfence with load/indirect branch/ret |
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2020-03-06 |
Jan Beulich | x86: correct MPX insn w/o base or index encoding in... |
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2020-03-03 |
H.J. Lu | x86: Allow integer conversion without suffix in AT... |
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2020-03-03 |
Hongtao Liu | x86: Improve -malign-branch |
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2020-02-19 |
H.J. Lu | x86: Mark cvtpi2ps and cvtpi2pd as MMX |
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2020-02-17 |
Jan Beulich | x86/Intel: don't swap operands of MONITOR{,X} and MWAIT{,X} |
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2020-02-17 |
Jan Beulich | x86/Intel: improve diagnostics for ambiguous VCVT*... |
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2020-02-14 |
Jan Beulich | x86: replace adhoc (partly wrong) ambiguous operand... |
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2020-02-14 |
Jan Beulich | x86: optimize away pointless segment overrides |
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2020-02-14 |
Jan Beulich | x86: extend LEA's segment override warning |
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2020-02-13 |
H.J. Lu | x86: Resolve PLT32 reloc aganst local symbol to section |
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2020-02-12 |
Jan Beulich | x86-64: Intel64 adjustments for insns dealing with... |
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2020-02-10 |
H.J. Lu | x86: Accept Intel64 only instruction by default |
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2020-02-06 |
H.J. Lu | x86: Run unique tests only for ELF targets |
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2020-02-03 |
H.J. Lu | ELF: Add support for unique section ID to assembler |
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2020-01-27 |
H.J. Lu | x86-64: Properly encode and decode movsxd |
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2020-01-21 |
Jan Beulich | x86: improve handling of insns with ambiguous operand... |
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2020-01-16 |
Jan Beulich | x86: VPEXTRQ/VPINSRQ are unavailable outside of 64... |
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2020-01-14 |
Lili Cui | x86: Updated align branch tests for Darwin and i686... |
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2020-01-09 |
Jan Beulich | x86: SYSENTER/SYSEXIT are unavailable in 64-bit mode... |
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2020-01-01 |
Alan Modra | Update year range in copyright notice of binutils files |
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2019-12-27 |
Jan Beulich | x86-64: fix Intel64 handling of branch with data16... |
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2019-12-27 |
Jan Beulich | x86: consolidate Disp<NN> handling a little |
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2019-12-12 |
H.J. Lu | i386: Add tests for -malign-branch-boundary and -malign... |
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2019-11-14 |
Jan Beulich | x86/Intel: extend MOVSD/CMPSD testsuite coverage |
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2019-11-08 |
H.J. Lu | i386: Only check suffix in instruction mnemonic |
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2019-10-30 |
Jan Beulich | x86: add tests to cover defaulting of operand sizes... |
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2019-10-07 |
Jan Beulich | x86/Intel: correct MOVSD and CMPSD handling |
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2019-07-01 |
Jan Beulich | x86: optimize AND/OR with twice the same register |
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2019-07-01 |
Jan Beulich | x86-64: optimize certain commutative VEX-encoded insns |
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2019-07-01 |
Jan Beulich | x86: warn about insns exceeding the 15-byte limit |
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2019-06-27 |
Jan Beulich | x86: allow VEX et al encodings in 16-bit (protected... |
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2019-06-25 |
Jan Beulich | x86: fix (dis)assembly of certain SSE2 insns in 16... |
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2019-06-04 |
H.J. Lu | Enable Intel AVX512_VP2INTERSECT insn |
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2019-06-04 |
H.J. Lu | Add support for Intel ENQCMD[S] instructions |
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2019-04-08 |
H.J. Lu | x86: Remove i386-*-kaos* and i386-*-chaos targets |
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2019-04-05 |
H.J. Lu | x86: Add assembler -mx86-used-note=yes test |
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2019-04-05 |
Xuepeng Guo | x86: Support Intel AVX512 BF16 |
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2019-03-19 |
H.J. Lu | x86: Correct EVEX to 128-bit EVEX optimization |
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2019-03-19 |
H.J. Lu | ix86: Disable AVX512F when disabling AVX2 |
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2019-03-18 |
H.J. Lu | x86: Optimize EVEX vector load/store instructions |
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2019-03-17 |
H.J. Lu | x86: Encode 256-bit/512-bit VEX/EVEX insns with 128... |
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2019-03-16 |
H.J. Lu | x86: Correctly optimize EVEX to 128-bit VEX/EVEX |
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2019-01-01 |
Alan Modra | Update year range in copyright notice of binutils files |
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2018-12-09 |
H.J. Lu | x86: Put back BFD_RELOC_X86_64_GOTPCREL |
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2018-11-06 |
Jan Beulich | x86: adjust {,E}VEX.W handling outside of 64-bit mode |
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2018-11-06 |
Jan Beulich | x86: fix various non-LIG templates |
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2018-09-17 |
H.J. Lu | x86: Set EVex=2 on EVEX.128 only vmovd and vmovq |
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2018-09-17 |
H.J. Lu | x86: Set Vex=1 on VEX.128 only vmovd and vmovq |
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2018-09-17 |
H.J. Lu | x86: Add -mvexwig=[0|1] option to assembler |
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2018-09-14 |
H.J. Lu | x86: Check non-WIG EVEX instruction encoding with ... |
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2018-09-14 |
H.J. Lu | x86: Properly decode EVEX.W in vcvt[u]si2s[sd] in 32... |
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2018-08-27 |
H.J. Lu | x86: Don't mask out the GNU_PROPERTY_X86_UINT32_VALID bit |
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2018-08-10 |
H.J. Lu | x86: Don't display --32/--64/--x32 without BFD64 |
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2018-08-05 |
H.J. Lu | x86: Update assembler tests for non-ELF targets |
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2018-07-31 |
Jan Beulich | x86/Intel: correct permitted operand sizes for AVX512... |
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2018-07-31 |
Jan Beulich | x86: don't abort() upon DATA16 prefix on (E)VEX encoded... |
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2018-07-30 |
Jan Beulich | x86: don't mistakenly scale non-8-bit displacements |
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2018-07-24 |
Jan Beulich | x86-64: correct AVX512F vcvtsi2s{d,s} handling |
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2018-05-30 |
Amit Pawar | Add znver2 support. |
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2018-05-07 |
H.J. Lu | Enable Intel MOVDIRI, MOVDIR64B instructions |
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2018-04-27 |
Igor Tsimbalist | Revert "Enable Intel MOVDIRI, MOVDIR64B instructions." |
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2018-04-26 |
Igor Tsimbalist | Enable Intel MOVDIRI, MOVDIR64B instructions. |
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2018-04-26 |
Jan Beulich | x86: properly force / avoid forcing EVEX encoding |
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2018-04-26 |
Jan Beulich | x86: drop CpuRegMMX, CpuReg[XYZ]MM, and CpuRegMask |
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2018-04-26 |
Jan Beulich | x86: don't recognize bnd<N> as registers without CpuMPX |
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