2021-12-09 |
Nelson Chu | RISC-V: Clarify the behavior of .option arch directive. |
tree | commitdiff |
2021-11-30 |
Nelson Chu | RISC-V: The vtype immediate with more than the defined... |
tree | commitdiff |
2021-11-30 |
Nelson Chu | RISC-V: Dump vset[i]vli immediate as numbers once vsew... |
tree | commitdiff |
2021-11-22 |
Nelson Chu | RISC-V: Replace .option rvc/norvc with .option arch... |
tree | commitdiff |
2021-11-19 |
Nelson Chu | RISC-V: Support new .option arch directive. |
tree | commitdiff |
2021-11-19 |
Nelson Chu | RISC-V: Support STO_RISCV_VARIANT_CC and DT_RISCV_VARIA... |
tree | commitdiff |
2021-11-18 |
jiawei | RISC-V: Add testcases for z[fdq]inx |
tree | commitdiff |
2021-11-17 |
Nelson Chu | RISC-V: Support rvv extension with released version... |
tree | commitdiff |
2021-11-16 |
jiawei | RISC-V: Scalar crypto instruction and entropy source... |
tree | commitdiff |
2021-11-11 |
Nelson Chu | RISC-V: Dump objects according to the elf architecture... |
tree | commitdiff |
2021-10-07 |
Philipp Tomsich | RISC-V: Support aliases for Zbs instructions |
tree | commitdiff |
2021-10-07 |
Philipp Tomsich | RISC-V: Add support for Zbs instructions |
tree | commitdiff |
2021-09-28 |
Nelson Chu | RISC-V: Allow to add numbers in the prefixed extension... |
tree | commitdiff |
2021-09-13 |
Nelson Chu | RISC-V: Update the assembler insn testcase. |
tree | commitdiff |
2021-09-09 |
Jim Wilson | RISC-V: Pretty print values formed with lui and addiw. |
tree | commitdiff |
2021-08-31 |
Nelson Chu | RISC-V: Extend .insn directive to support hardcode... |
tree | commitdiff |
2021-08-30 |
Nelson Chu | RISC-V: PR27916, Support mapping symbols. |
tree | commitdiff |
2021-07-20 |
Nelson Chu | RISC-V: Minor updates for architecture parser. |
tree | commitdiff |
2021-05-24 |
Nelson Chu | RISC-V: PR25212, Report errors for invalid march and... |
tree | commitdiff |
2021-05-03 |
Christoph Muellner | RISC-V: PR27764, Add tests for A extension |
tree | commitdiff |
2021-04-16 |
Nelson Chu | RISC-V: PR27436, make operand C> work the same as >. |
tree | commitdiff |
2021-04-16 |
Lifang Xia | RISC-V: compress "addi d,CV,z" to "c.mv d,CV" |
tree | commitdiff |
2021-04-12 |
Nelson Chu | RISC-V: Support to parse the multi-letter prefix in... |
tree | commitdiff |
2021-03-16 |
Kuan-Lin Chen | RISC-V : Support bitmanip-0.93 ZBA/ZBB/ZBC instructions |
tree | commitdiff |
2021-02-19 |
Nelson Chu | RISC-V: PR27158, fixed UJ/SB types and added CSS/CL... |
tree | commitdiff |
2021-02-04 |
Nelson Chu | RISC-V: Removed the v0.93 bitmanip ZBA/ZBB/ZBC instruct... |
tree | commitdiff |
2021-01-15 |
Nelson Chu | RISC-V: Error and warning messages tidy. |
tree | commitdiff |
2021-01-07 |
Philipp Tomsich | RISC-V: Add pause hint instruction. |
tree | commitdiff |
2021-01-07 |
Claire Xenia Wolf | RISC-V: Support riscv bitmanip frozen ZBA/ZBB/ZBC instr... |
tree | commitdiff |
2021-01-06 |
Marcus Comstedt | RISC-V: Fix riscv gas/ld testsuites failures for big... |
tree | commitdiff |
2021-01-01 |
Alan Modra | Update year range in copyright notice of binutils files |
tree | commitdiff |
2020-12-10 |
Nelson Chu | RISC-V: Add sext.[bh] and zext.[bhw] pseudo instructions. |
tree | commitdiff |
2020-12-10 |
Nelson Chu | RISC-V: Control fence.i and csr instructions by zifence... |
tree | commitdiff |
2020-12-01 |
Nelson Chu | RISC-V: Support to add implicit extensions for G. |
tree | commitdiff |
2020-12-01 |
Nelson Chu | RISC-V: Support to add implicit extensions. |
tree | commitdiff |
2020-12-01 |
Nelson Chu | RISC-V: Improve the version parsing for arch string. |
tree | commitdiff |
2020-12-01 |
Nelson Chu | RISC-V: Add zifencei and prefixed h class extensions. |
tree | commitdiff |
2020-12-01 |
Nelson Chu | RISC-V: Don't allow any uppercase letter in the arch... |
tree | commitdiff |
2020-12-01 |
Nelson Chu | RISC-V: Minor cleanup and testcases improvement for... |
tree | commitdiff |
2020-11-09 |
Nelson Chu | RISC-V: Update ABI to the elf_flags after parsing elf... |
tree | commitdiff |
2020-09-24 |
Jim Wilson | RISC-V: Error for relaxable branch in absolute section. |
tree | commitdiff |
2020-06-30 |
Nelson Chu | RISC-V: Support debug and float CSR as the unprivileged... |
tree | commitdiff |
2020-06-23 |
Nelson Chu | RISC-V: Generate ELF priv attributes if priv instructio... |
tree | commitdiff |
2020-06-12 |
Nelson Chu | RISC-V: Drop the privileged spec v1.9 support. |
tree | commitdiff |
2020-06-05 |
Nelson Chu | RISC-V: Don't generate the ELF privilege attributes... |
tree | commitdiff |
2020-05-20 |
Nelson Chu | [PATCH v2 0/9] RISC-V: Support version controling for... |
tree | commitdiff |
2020-03-30 |
Nelson Chu | RISC-V: Update CSR to privileged spec 1.11. |
tree | commitdiff |
2020-03-05 |
Nelson Chu | RISC-V: Support assembler modifier %got_pcrel_hi. |
tree | commitdiff |
2020-02-21 |
Nelson Chu | RISC-V: Support the read-only CSR checking. |
tree | commitdiff |
2020-02-21 |
Nelson Chu | RISC-V: Disable the CSR checking by default. |
tree | commitdiff |
2020-02-21 |
Nelson Chu | RISC-V: Support the ISA-dependent CSR checking. |
tree | commitdiff |
2020-02-19 |
Jim Wilson | RISC-V: Convert the ADD/ADDI to the compressed MV/LI... |
tree | commitdiff |
2020-01-23 |
Jim Wilson | RISC-V: Change -march parsing. |
tree | commitdiff |
2020-01-01 |
Alan Modra | Update year range in copyright notice of binutils files |
tree | commitdiff |
2019-11-28 |
Andrew Burgess | gas/riscv: Produce version 3 DWARF CIE by default |
tree | commitdiff |
2019-11-28 |
Andrew Burgess | gas: Check for overflow on return column in version... |
tree | commitdiff |
2019-11-28 |
Andrew Burgess | binutils/gas/riscv: Add DWARF register numbers for... |
tree | commitdiff |
2019-11-13 |
Jim Wilson | RISC-V: Support the INSN_CLASS.*F.* classes for .insn... |
tree | commitdiff |
2019-08-26 |
Kito Cheng | RISC-V: Improve li expansion for better code density. |
tree | commitdiff |
2019-07-30 |
Jim Wilson | RISC-V: Fix minor issues with FP csr instructions. |
tree | commitdiff |
2019-07-05 |
Jim Wilson | Kito's 5-part patch set to improve .insn support. |
tree | commitdiff |
2019-05-30 |
Jim Wilson | RISC-V: Fix lui argument parsing. |
tree | commitdiff |
2019-01-16 |
Jim Wilson | Don't emit vendor attribute section if there is no... |
tree | commitdiff |
2019-01-16 |
Jim Wilson | RISC-V: Support ELF attribute for gas and readelf. |
tree | commitdiff |
2019-01-01 |
Alan Modra | Update year range in copyright notice of binutils files |
tree | commitdiff |
2018-12-11 |
Jim Wilson | RISC-V: Don't segfault for two regs in auipc or lui. |
tree | commitdiff |
2018-12-07 |
Jim Wilson | RISC-V: Fix 4-arg add parsing. |
tree | commitdiff |
2018-12-03 |
Jim Wilson | RISC-V: Accept version, supervisor ext and more than... |
tree | commitdiff |
2018-11-27 |
Jim Wilson | RISC-V: Add .insn CA support. |
tree | commitdiff |
2018-10-02 |
Palmer Dabbelt | RISC-V: Add fence.tso instruction |
tree | commitdiff |
2018-09-17 |
Jim Wilson | RISC-V: bge[u] should get higher priority than ble[u]. |
tree | commitdiff |
2018-09-15 |
Alan Modra | gas run_dump_test rename stderr and error-output |
tree | commitdiff |
2018-08-31 |
Jim Wilson | RISC-V: Correct the requirement of compressed floating... |
tree | commitdiff |
2018-08-23 |
Jim Wilson | RISC-V: Reject empty rouding mode and fence operand. |
tree | commitdiff |
2018-06-20 |
Sebastian Huber | RISC-V: Accept constant operands in la and lla |
tree | commitdiff |
2018-05-24 |
Jim Wilson | RISC-V: Fix .align handling when .option norelax. |
tree | commitdiff |
2018-05-08 |
Jim Wilson | RISC-V: Add missing hint instructions from RV128I. |
tree | commitdiff |
2018-04-20 |
Jim Wilson | RISC-V: Add new option -mrelax/-mno-relax. |
tree | commitdiff |
2018-03-16 |
Jim Wilson | RISC-V: Emit better warning for unknown CSR. |
tree | commitdiff |
2018-03-14 |
Jim Wilson | Missing testcase files for last commit. |
tree | commitdiff |
2018-01-15 |
Jim Wilson | RISC-V: Add support for addi that compresses to c.nop. |
tree | commitdiff |
2018-01-10 |
Jim Wilson | RISC-V: Disassemble x0 based addresses as 0. |
tree | commitdiff |
2018-01-04 |
Jim Wilson | RISC-V: Add 2 missing privileged registers. |
tree | commitdiff |
2018-01-03 |
Alan Modra | Update year range in copyright notice of binutils files |
tree | commitdiff |
2017-12-28 |
Jim Wilson | RISC-V: Add missing privileged spec registers. |
tree | commitdiff |
2017-12-20 |
Jim Wilson | RISC-V: Add compressed instruction hints, and a few... |
tree | commitdiff |
2017-12-13 |
Jim Wilson | Add missing RISC-V fsrmi and fsflagsi instructions. |
tree | commitdiff |
2017-11-29 |
Jim Wilson | Fix riscv malloc error on small alignment after norvc. |
tree | commitdiff |
2017-11-28 |
Jim Wilson | Compress loads/stores with implicit 0 offset. |
tree | commitdiff |
2017-11-07 |
Jim Wilson | RISC-V: Fix riscv g++ testsuite EH failures. |
tree | commitdiff |
2017-11-07 |
Palmer Dabbelt | RISC-V: Add satp as an alias for sptbr |
tree | commitdiff |
2017-10-24 |
Andrew Waterman | RISC-V: Fix disassembly of c.addi4spn, c.addi16sp,... |
tree | commitdiff |
2017-10-24 |
Andrew Waterman | RISC-V: Only relax to C.LUI when imm != 0 and rd !... |
tree | commitdiff |
2017-09-27 |
Nick Clifton | Add support for the new names of the RISC-V fmv.x.s... |
tree | commitdiff |
2017-01-02 |
Alan Modra | Update year range in copyright notice of all files. |
tree | commitdiff |
2016-11-01 |
Nick Clifton | Add support for RISC-V architecture. |
tree | commitdiff |
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