aarch64.md (subv<GPI>4, [...]): New patterns.
[gcc.git] / gcc / config / aarch64 / aarch64.md
2018-07-19 Michael Collisonaarch64.md (subv<GPI>4, [...]): New patterns.
2018-07-02 Richard Hendersonaarch64: Add movprfx patterns alternatives
2018-06-27 Tamar ChristinaAdd SIMD to REG pattern for movhf without armv8.2-a...
2018-06-05 Steve Ellceyre PR target/79924 (aarch64: untranslated diagnostics...
2018-06-01 Michael Collison2018-05-15 Michael Collison <michael.collison@arm...
2018-05-22 Luis Machado[AArch64] Recognize a missed usage of a sbfiz instruction
2018-05-22 Jackson Woodruff[AArch64] Merge stores of D-register values with differ...
2018-05-21 Kyrylo Tkachov[AArch64] Implement usadv16qi and ssadv16qi standard...
2018-05-16 Wilco Dijkstra[AArch64] Improve register allocation of fma
2018-05-14 Wilco DijkstraRemove remaining uses of * in patterns
2018-04-24 Kyrylo Tkachov[AArch64] PR target/85512: Tighten SIMD right shift...
2018-03-20 Jakub Jelinekre PR target/84845 (ICE: in extract_insn, at recog...
2018-03-13 Richard Sandiford[AArch64] Add a tlsdesc call pattern for SVE
2018-03-12 Renlin Li[PATCH][AARCH64]Fix immediate alternative of movhf_aarc...
2018-03-08 Kyrylo Tkachov[AArch64] PR target/84748: Mark *compare_cstore<mode...
2018-02-01 Richard Sandiford[AArch64] Handle SVE subregs that are effectively REVs
2018-01-26 Kyrylo Tkachov[AArch64] Fix gcc.target/aarch64/subs_compare_[12].c
2018-01-17 Wilco Dijkstra[AArch64] PR82964: Fix 128-bit immediate ICEs
2018-01-13 Richard SandifordAdd support for SVE scatter stores
2018-01-13 Richard SandifordAdd support for SVE gather loads
2018-01-13 Richard SandifordAdd support for in-order addition reduction using SVE...
2018-01-13 Richard SandifordAdd support for conditional reductions using SVE CLASTB
2018-01-13 Richard SandifordAdd support for fully-predicated loops
2018-01-13 Richard SandifordSLP reductions with variable-length vectors
2018-01-13 Richard Sandiford[AArch64] SVE load/store_lanes support
2018-01-13 Richard Sandiford[AArch64] Add SVE support
2018-01-11 Richard Sandiford[AArch64] Set NUM_POLY_INT_COEFFS to 2
2018-01-03 Jakub JelinekUpdate copyright years.
2017-12-01 Wilco Dijkstra[AArch64] Fix address printing on ILP32
2017-11-28 Ramana Radhakrishnan[Patch AArch64] Fixup floating point division with...
2017-11-07 Richard Sandiford[AArch64] Use aarch64_reg_or_imm instead of nonmemory_o...
2017-11-01 Richard Sandiford[AArch64] Rename the internal "Upl" constraint
2017-10-27 Michael Collisonaarch64.md (<optab>_trunc><vf><GPI:mode>2): New pattern.
2017-10-26 Tamar Christinare PR target/81800 (On aarch64 ilp32 lrint should not...
2017-10-08 Michael Collisonaarch64.md (*aarch64_reg_<optab>_minus<mode>3): New...
2017-09-12 Wilco DijkstraRemove '*' from movsi/di/ti patterns
2017-09-12 James Greenhalgh[Patch AArch64 2/2] Fix memory sizes to load/store...
2017-09-12 James Greenhalgh[Mechanical Patch ARM/AArch64 1/2] Rename load/store...
2017-08-31 Richard Sandiford[AArch64] Rename cmp_result iterator
2017-08-31 Richard Sandiford[AArch64] Remove use of wider vector modes
2017-08-22 Richard Sandiford[AArch64] Fix label mode
2017-08-11 Tamar Christinaaarch64.md (mov<mode>): Change.
2017-08-09 Jim WilsonAdd falkor pipeline description.
2017-08-08 Tamar Christinare PR middle-end/19706 (Recognize common Fortran usages...
2017-07-28 Tamar Christina2017-07-28 Tamar Christina <tamar.christina@arm.com>
2017-07-28 Tamar Christinaaarch64.md (mov<mode>): Generalize.
2017-07-28 Tamar Christina2017-07-28 Tamar Christina <tamar.christina@arm.com>
2017-07-27 Kyrylo Tkachov[PATCH][AArch64] Fix missing optimization for CMP+AND
2017-07-12 Michael Collisonaarch64-simd.md (aarch64_sub<mode>_compare0): New pattern.
2017-06-29 Kyrylo Tkachovre PR target/70119 (AArch64 should take advantage of...
2017-06-21 Wilco DijkstraEmit SIMD moves as mov
2017-06-09 Tamar Christinaaarch64.md (lrint<GPF:mode><GPI:mode>2): New.
2017-06-07 Tamar Christina2017-06-07 Tamar Christina <tamar.christina@arm.com>
2017-06-05 Kyrylo Tkachov[AArch64] Use SUBS for parallel subtraction and compari...
2017-06-05 Kyrylo Tkachov[AArch64] Peephole for SUBS
2017-05-15 Renlin Li[PATCH][AARCH64]Simplify call, call_value, sibcall...
2017-05-08 Richard Sandiford[AArch64] Tighten move constraints for symbolic operands
2017-05-05 Wilco DijkstraFloat to int moves currently generate inefficient code...
2017-05-04 Kyrylo Tkachov[AArch64] Accept more addressing modes for PRFM
2017-04-05 Eric Botcazoure PR target/78002 (gcc.target/aarch64/stack-checking...
2017-02-08 Andrew Pinskiaarch64.md (popcount<mode>2): New pattern.
2017-02-06 Julian Brownaarch64-cores.def: Change the scheduler to Thunderx2t99.
2017-01-20 Jiong Wang[AArch64][1/4] Support Return address protection on...
2017-01-19 Kyrylo Tkachov[AArch64] Purge leftover occurrences of aarch64_nopcrel...
2017-01-17 Wilco DijkstraThis patch simplifies the handling of EH return.
2017-01-01 Jakub JelinekUpdate copyright years.
2016-12-16 Kyrylo Tkachov[AArch64] Split X-reg UBFIZ into W-reg LSL when possible
2016-12-16 Kyrylo Tkachov[AArch64] Split X-reg UBFX into W-reg LSR when possible
2016-12-08 Naveen H.Saarch64.c (aarch64_load_symref_appropriately): Handle...
2016-12-07 Wilco DijkstraImprove TI mode address offsets - these may either...
2016-12-02 Kyrylo Tkachov[AArch64] Separate shrink wrapping hooks implementation
2016-11-30 Kyrylo Tkachov[AArch64] PR target/78362: Make sure to only take REGNO...
2016-11-24 James Greenhalgh[Patch AArch64 11/17] Add floatdihf2 and floatunsdihf2...
2016-11-23 Michael Collison2016-11-22 Michael Collison <michael.collison@arm...
2016-11-17 Kyrylo Tkachov[AArch64] Expand DImode constant stores to two SImode...
2016-11-14 Wilco DijkstraCurrently the SBFM, UBFM and BFM instructions all use...
2016-11-07 Kyrylo Tkachov[AArch64] Fix PR target/77822: Use tighter predicates...
2016-11-02 Wilco DijkstraThe add expander still contains some expansion code...
2016-09-01 Kyrylo Tkachov[AArch64] Add ANDS pattern for CMP+ZERO_EXTEND
2016-08-09 Renlin Li[PATCH][PR64971]Convert function pointer to Pmode when...
2016-08-02 Tamar Christina[PATCH AArch64] Add more AArch64 NEON intrinsics
2016-07-28 Wilco DijkstraOn AArch64 the UXTB and UXTH instructions are aliases...
2016-07-25 Jiong Wang[AArch64][9/10] ARMv8.2-A FP16 three operands scalar...
2016-07-25 Jiong Wang[AArch64][8/10] ARMv8.2-A FP16 two operands scalar...
2016-07-25 Jiong Wang[AArch64][7/10] ARMv8.2-A FP16 one operand scalar intri...
2016-06-20 James Greenhalgh[Patch AArch64] Fixup to fcvt patterns added in r237200
2016-06-14 Kyrylo Tkachov[AArch64] Handle AND+ASHIFT form of UBFIZ correctly...
2016-06-13 Evandro Menezes[AArch64] Emit division using the Newton series
2016-06-13 Evandro Menezes[AArch64] Emit square root using the Newton series
2016-06-08 Jiong Wang[AArch64, 1/6] Reimplement scalar fixed-point intrinsics
2016-06-06 Kyrylo Tkachov[2/3][AArch64] Keep CTZ components together until after...
2016-05-27 Kyrylo Tkachov[AArch64] Simplify ashl<mode>3 expander for SHORT modes
2016-05-16 Wilco DijkstraSome patterns are using '%w2' for immediate operands...
2016-05-16 Wilco DijkstraThis patch fixes the attributes of integer immediate...
2016-04-27 Evandro Menezes[AArch64] Replace insn to zero up SIMD registers
2016-04-20 Andrew Pinski[AArch64] Work around PR target/64971
2016-02-17 Kyrylo Tkachov[AArch64] PR target/69161: Don't use special predicate...
2016-02-15 Evandro MenezesAdd support for the FCCMP insn types
2016-01-28 Richard Hendersonre PR target/69305 (wrong code with -O and int128 ...
2016-01-28 Wilco DijkstraSeveral instructions disassemble a zero immediate as...
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