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[AArch64] Add a tlsdesc call pattern for SVE
[gcc.git]
/
gcc
/
config
/
aarch64
/
aarch64.md
2018-03-13
Richard Sandiford
[AArch64] Add a tlsdesc call pattern for SVE
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2018-03-12
Renlin Li
[PATCH][AARCH64]Fix immediate alternative of movhf_aarc...
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2018-03-08
Kyrylo Tkachov
[AArch64] PR target/84748: Mark *compare_cstore<mode...
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2018-02-01
Richard Sandiford
[AArch64] Handle SVE subregs that are effectively REVs
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2018-01-26
Kyrylo Tkachov
[AArch64] Fix gcc.target/aarch64/subs_compare_[12].c
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2018-01-17
Wilco Dijkstra
[AArch64] PR82964: Fix 128-bit immediate ICEs
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2018-01-13
Richard Sandiford
Add support for SVE scatter stores
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2018-01-13
Richard Sandiford
Add support for SVE gather loads
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2018-01-13
Richard Sandiford
Add support for in-order addition reduction using SVE...
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2018-01-13
Richard Sandiford
Add support for conditional reductions using SVE CLASTB
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2018-01-13
Richard Sandiford
Add support for fully-predicated loops
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2018-01-13
Richard Sandiford
SLP reductions with variable-length vectors
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2018-01-13
Richard Sandiford
[AArch64] SVE load/store_lanes support
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2018-01-13
Richard Sandiford
[AArch64] Add SVE support
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2018-01-11
Richard Sandiford
[AArch64] Set NUM_POLY_INT_COEFFS to 2
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2018-01-03
Jakub Jelinek
Update copyright years.
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2017-12-01
Wilco Dijkstra
[AArch64] Fix address printing on ILP32
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2017-11-28
Ramana Radhakrishnan
[Patch AArch64] Fixup floating point division with...
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2017-11-07
Richard Sandiford
[AArch64] Use aarch64_reg_or_imm instead of nonmemory_o...
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2017-11-01
Richard Sandiford
[AArch64] Rename the internal "Upl" constraint
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2017-10-27
Michael Collison
aarch64.md (<optab>_trunc><vf><GPI:mode>2): New pattern.
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2017-10-26
Tamar Christina
re PR target/81800 (On aarch64 ilp32 lrint should not...
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2017-10-08
Michael Collison
aarch64.md (*aarch64_reg_<optab>_minus<mode>3): New...
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2017-09-12
Wilco Dijkstra
Remove '*' from movsi/di/ti patterns
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2017-09-12
James Greenhalgh
[Patch AArch64 2/2] Fix memory sizes to load/store...
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2017-09-12
James Greenhalgh
[Mechanical Patch ARM/AArch64 1/2] Rename load/store...
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2017-08-31
Richard Sandiford
[AArch64] Rename cmp_result iterator
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2017-08-31
Richard Sandiford
[AArch64] Remove use of wider vector modes
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2017-08-22
Richard Sandiford
[AArch64] Fix label mode
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2017-08-11
Tamar Christina
aarch64.md (mov<mode>): Change.
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2017-08-09
Jim Wilson
Add falkor pipeline description.
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2017-08-08
Tamar Christina
re PR middle-end/19706 (Recognize common Fortran usages...
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2017-07-28
Tamar Christina
2017-07-28 Tamar Christina <tamar.christina@arm.com>
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2017-07-28
Tamar Christina
aarch64.md (mov<mode>): Generalize.
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2017-07-28
Tamar Christina
2017-07-28 Tamar Christina <tamar.christina@arm.com>
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2017-07-27
Kyrylo Tkachov
[PATCH][AArch64] Fix missing optimization for CMP+AND
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2017-07-12
Michael Collison
aarch64-simd.md (aarch64_sub<mode>_compare0): New pattern.
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2017-06-29
Kyrylo Tkachov
re PR target/70119 (AArch64 should take advantage of...
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2017-06-21
Wilco Dijkstra
Emit SIMD moves as mov
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2017-06-09
Tamar Christina
aarch64.md (lrint<GPF:mode><GPI:mode>2): New.
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2017-06-07
Tamar Christina
2017-06-07 Tamar Christina <tamar.christina@arm.com>
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2017-06-05
Kyrylo Tkachov
[AArch64] Use SUBS for parallel subtraction and compari...
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2017-06-05
Kyrylo Tkachov
[AArch64] Peephole for SUBS
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2017-05-15
Renlin Li
[PATCH][AARCH64]Simplify call, call_value, sibcall...
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2017-05-08
Richard Sandiford
[AArch64] Tighten move constraints for symbolic operands
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2017-05-05
Wilco Dijkstra
Float to int moves currently generate inefficient code...
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2017-05-04
Kyrylo Tkachov
[AArch64] Accept more addressing modes for PRFM
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2017-04-05
Eric Botcazou
re PR target/78002 (gcc.target/aarch64/stack-checking...
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2017-02-08
Andrew Pinski
aarch64.md (popcount<mode>2): New pattern.
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2017-02-06
Julian Brown
aarch64-cores.def: Change the scheduler to Thunderx2t99.
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2017-01-20
Jiong Wang
[AArch64][1/4] Support Return address protection on...
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2017-01-19
Kyrylo Tkachov
[AArch64] Purge leftover occurrences of aarch64_nopcrel...
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2017-01-17
Wilco Dijkstra
This patch simplifies the handling of EH return.
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2017-01-01
Jakub Jelinek
Update copyright years.
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2016-12-16
Kyrylo Tkachov
[AArch64] Split X-reg UBFIZ into W-reg LSL when possible
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2016-12-16
Kyrylo Tkachov
[AArch64] Split X-reg UBFX into W-reg LSR when possible
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2016-12-08
Naveen H.S
aarch64.c (aarch64_load_symref_appropriately): Handle...
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2016-12-07
Wilco Dijkstra
Improve TI mode address offsets - these may either...
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2016-12-02
Kyrylo Tkachov
[AArch64] Separate shrink wrapping hooks implementation
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2016-11-30
Kyrylo Tkachov
[AArch64] PR target/78362: Make sure to only take REGNO...
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2016-11-24
James Greenhalgh
[Patch AArch64 11/17] Add floatdihf2 and floatunsdihf2...
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2016-11-23
Michael Collison
2016-11-22 Michael Collison <michael.collison@arm...
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2016-11-17
Kyrylo Tkachov
[AArch64] Expand DImode constant stores to two SImode...
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2016-11-14
Wilco Dijkstra
Currently the SBFM, UBFM and BFM instructions all use...
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2016-11-07
Kyrylo Tkachov
[AArch64] Fix PR target/77822: Use tighter predicates...
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2016-11-02
Wilco Dijkstra
The add expander still contains some expansion code...
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2016-09-01
Kyrylo Tkachov
[AArch64] Add ANDS pattern for CMP+ZERO_EXTEND
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2016-08-09
Renlin Li
[PATCH][PR64971]Convert function pointer to Pmode when...
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2016-08-02
Tamar Christina
[PATCH AArch64] Add more AArch64 NEON intrinsics
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2016-07-28
Wilco Dijkstra
On AArch64 the UXTB and UXTH instructions are aliases...
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2016-07-25
Jiong Wang
[AArch64][9/10] ARMv8.2-A FP16 three operands scalar...
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2016-07-25
Jiong Wang
[AArch64][8/10] ARMv8.2-A FP16 two operands scalar...
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2016-07-25
Jiong Wang
[AArch64][7/10] ARMv8.2-A FP16 one operand scalar intri...
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2016-06-20
James Greenhalgh
[Patch AArch64] Fixup to fcvt patterns added in r237200
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2016-06-14
Kyrylo Tkachov
[AArch64] Handle AND+ASHIFT form of UBFIZ correctly...
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2016-06-13
Evandro Menezes
[AArch64] Emit division using the Newton series
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2016-06-13
Evandro Menezes
[AArch64] Emit square root using the Newton series
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2016-06-08
Jiong Wang
[AArch64, 1/6] Reimplement scalar fixed-point intrinsics
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2016-06-06
Kyrylo Tkachov
[2/3][AArch64] Keep CTZ components together until after...
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2016-05-27
Kyrylo Tkachov
[AArch64] Simplify ashl<mode>3 expander for SHORT modes
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2016-05-16
Wilco Dijkstra
Some patterns are using '%w2' for immediate operands...
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2016-05-16
Wilco Dijkstra
This patch fixes the attributes of integer immediate...
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2016-04-27
Evandro Menezes
[AArch64] Replace insn to zero up SIMD registers
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2016-04-20
Andrew Pinski
[AArch64] Work around PR target/64971
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2016-02-17
Kyrylo Tkachov
[AArch64] PR target/69161: Don't use special predicate...
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2016-02-15
Evandro Menezes
Add support for the FCCMP insn types
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2016-01-28
Richard Henderson
re PR target/69305 (wrong code with -O and int128 ...
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2016-01-28
Wilco Dijkstra
Several instructions disassemble a zero immediate as...
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2016-01-22
Richard Henderson
re PR target/69416 (Nonsense rtl checking failure)
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2016-01-19
Wilco Dijkstra
[PATCH 2/4] Add support for float CCMP
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2016-01-19
Wilco Dijkstra
[Patch 1/4] Simplify the representation of CCMP pattern...
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2016-01-18
Richard Henderson
re PR target/69176 (ICE in in final_scan_insn, at final...
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2016-01-11
Kyrylo Tkachov
[AArch64] PR rtl-optimization/68796: Add patterns for...
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2016-01-04
Jakub Jelinek
Update copyright years.
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2015-12-18
Kyrylo Tkachov
[AArch64] PR rtl-optimization/68796 Add compare-of...
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2015-12-09
James Greenhalgh
[Patch AArch64] Reinstate CANNOT_CHANGE_MODE_CLASS...
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2015-12-07
Evandro Menezes
Add scheduling model for Exynos M1
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2015-12-04
James Greenhalgh
[AArch64] Add register constraints to add<mode>3_pluslong
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2015-12-04
Eric Botcazou
re PR middle-end/65958 (-fstack-check breaks alloca...
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2015-12-04
Eric Botcazou
re PR middle-end/65958 (-fstack-check breaks alloca...
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