analyzer: add function-set.cc/h
[gcc.git] / gcc / config /
2020-01-14 Jakub Jelineki386: Fix wrong-code x86 issue with avx512{f,vl} fma...
2020-01-14 Uros BizjakPR target/93254 - -msse generates sse2 instructions
2020-01-13 Andrew PinskiAdd initial octeontx2 support.
2020-01-10 Stam Markianos-Wrightaarch64.c (aarch64_invalid_conversion): New function...
2020-01-10 Stam Markianos-Wrightconfig.gcc: Add arm_bf16.h.
2020-01-10 Richard Sandiford[AArch64] Make -msve-vector-bits=128 generate VL-specif...
2020-01-10 Richard Sandiford[AArch64] Fix reversed vcond_mask invocation in aarch64...
2020-01-10 Richard Sandiford[AArch64] Tighten mode checks in aarch64_builtin_vector...
2020-01-09 Richard Sandiford[AArch64] Add support for the SVE2 ACLE
2020-01-09 Richard Sandiford[AArch64] Pass a mode to some SVE immediate queries
2020-01-09 Richard Sandiford[AArch64] Add banner comments to aarch64-sve2.md
2020-01-09 Richard Sandiford[AArch64] Simplify WHILERW and WHILEWR definition
2020-01-09 Richard Sandiford[AArch64] Rename UNSPEC_WHILE* to match instruction...
2020-01-09 Richard Sandiford[AArch64] Rename SVE shape "unary_count" to "unary_to_uint"
2020-01-09 Richard Sandiford[AArch64] Specify some SVE ACLE functions in a more...
2020-01-09 Richard Sandiford[AArch64] Tweak iterator usage for [SU]Q{ADD,SUB}
2020-01-09 Richard Sandiford[AArch64] Remove fictitious [SU]RHSUB instructions
2020-01-09 Richard SandifordAdd a compatible_vector_types_p target hook
2020-01-09 Jakub Jelinekre PR inline-asm/93202 ([RISCV] ICE when using inline...
2020-01-09 Jakub Jelinekre PR target/93141 (Missed optimization : Use of adc...
2020-01-09 Jim WilsonRISC-V: Disable use of TLS copy relocs.
2020-01-08 Jakub Jelinekre PR target/93187 (ICE in extract_insn, at recog.c...
2020-01-08 Jakub Jelinekre PR target/93174 (ICE building glibc __sha512_process...
2020-01-08 Georg-Johann LayAdd -nodevicespecs option for avr.
2020-01-08 Georg-Johann LayImplement 64-bit double functions.
2020-01-08 Richard Earnshawarm: Fix rmprofile multilibs when architecture includes...
2020-01-07 Michael MeissnerRevert patch accidentily created on the wrong sandbox
2020-01-07 Michael MeissnerRestore patch reverted on trunk instead of a branch
2020-01-07 Andrew Stubbs[amdgcn] Add more modes for vector comparisons
2020-01-07 Andrew StubbsDisallow 'B' constraints on amdgcn addc/subb
2020-01-07 Richard SandifordAdd a generic lhd_simulate_enum_decl
2020-01-07 Richard Sandiford[AArch64] Use type attributes to mark types that use...
2020-01-07 Michael MeissnerRefactor some code for a future change.
2020-01-07 Michael MeissnerUpdate 'Q' constraint documentation.
2020-01-07 Michael MeissnerFix bad code of vector extract of PC-relative address...
2020-01-07 Michael MeissnerAdd support for large prefixed address in adjusting...
2020-01-06 John David Anglinpa.md: Revert change to use ordered_comparison_operator...
2020-01-06 Andrew StubbsFix amdgcn issue with '0' constraints
2020-01-06 Bryan Stensonmips.c (vr4130_align_insns): Fix typo.
2020-01-06 Andrew StubbsFix early-clobber in amdgcn vec_extract
2020-01-06 Richard Sandiford[AArch64] Use move-if-change for aarch64-tune.md
2020-01-06 Richard Sandiford[AArch64] Fix constraints for CPY /M
2020-01-06 Andrew StubbsFix amdgcn inline immediate range
2020-01-05 Jakub Jelinekre PR target/93141 (Missed optimization : Use of adc...
2020-01-03 Jakub Jelinekre PR target/93089 (Force mprefer-vector-width=512...
2020-01-03 Jakub Jelinekre PR target/93089 (Force mprefer-vector-width=512...
2020-01-03 Jakub Jelinekre PR target/93110 (grub-2.04/grub-core/lib/division...
2020-01-02 Dennis Zhang[Arm] Enable CLI for Armv8.6-a: armv8.6-a, i8mm and...
2020-01-01 John David Anglinre PR target/67834 (Local references inside comdat...
2020-01-01 John David Anglinre PR target/93111 (FAIL: gfortran.fortran-torture...
2020-01-01 Jakub JelinekUpdate copyright years.
2019-12-30 Olivier HainqueArrange to preinclude yvals.h ahead of stdint on VxWorks 7
2019-12-30 Olivier HainqueAdd missing file expected with rev 279781
2019-12-30 Olivier HainqueAdd missing files expected with rev 279784
2019-12-30 Olivier HainqueAdd missing file expected with rev 279783
2019-12-30 Olivier HainqueAdd missing file expected with rev 279781
2019-12-30 Olivier HainqueSimplify the compilation commands for config/vxworks.c
2019-12-30 Joel BrobeckerSetup TARGET_C_PREINCLUDE for VxWorks
2019-12-30 Alexandre OlivaRefine definitions for wchar_t/wint_t on VxWorks
2019-12-30 Olivier HainqueIdentify sections in vx-common.h
2019-12-30 Doug RuppDefine STARTFILE_PREFIX_SPEC for powerpc VxWorks < 7
2019-12-30 Olivier HainqueImprove recursion protection for VxWorks limits.h
2019-12-30 Peter BergnerFix builtin functions needlessly using VIEW_CONVERT_EXP...
2019-12-29 Jakub Jelinekre PR target/93078 (Missing fma and round functions...
2019-12-27 Richard Sandiford[AArch64] Fix typo in V_INT_CONTAINER
2019-12-24 Jiufu Guors6000: re-enable web and rnreg with -funroll-loops
2019-12-20 Michael MeissnerRename signed integer 16/34-bit macros.
2019-12-20 Jakub Jelinekre PR target/92841 (Optimize -fstack-protector-strong...
2019-12-20 Jakub Jelinekre PR target/93002 (while(i--) optimization)
2019-12-19 Andrew StubbsAllow constants in amdgcn extends and truncates
2019-12-19 Andrew StubbsUse V64SI for all amdgcn add-with-carry insns
2019-12-19 Richard Sandiford[AArch64] Fix handling of npatterns>1 constants for...
2019-12-19 Andrew StubbsImplement sub-dword add/sub on amdgcn
2019-12-19 Richard Sandiford[AArch64] Reject invalid subregs involving partial...
2019-12-19 Richard Sandiford[AArch64] Handle arguments and return types with partia...
2019-12-18 Wilco Dijkstra[AArch64] Fixup core tunings
2019-12-18 Georg-Johann Lay* config/avr/avr-mcus.def: Typo.
2019-12-17 Michael MeissnerGenerate PADDI to add large constants if -mcpu=future.
2019-12-17 Michael MeissnerUse PLI to load up 32-bit SImode constants if -mcpu...
2019-12-17 Michael MeissnerUse PLI to load up large constants if -mcpu=future.
2019-12-17 Jakub Jelinekre PR target/92841 (Optimize -fstack-protector-strong...
2019-12-17 Christophe Lyon[ARM] Add support for -mpure-code in thumb-1 (v6m)
2019-12-17 Andrew StubbsAdd extract_last for amdgcn
2019-12-17 Andrew StubbsAdd clz and ctz for amdgcn
2019-12-17 Hongyu WangAdd abs pattern to handle {si,di} mode abs to avoid...
2019-12-17 H.J. LuUse add for a = a + b and a = b + a when possible.
2019-12-16 Segher Boessenkoolrs6000: Use symbolic names for the CR fields in more...
2019-12-16 Jozef LawrynowiczMSP430: Add new msp430-elfbare target
2019-12-16 Andreas KrebbelFix PR92950: Wrong code emitted for movv1qi
2019-12-14 Iain Sandoe[Darwin, PPC] Use Darwin9 bundle header for Rosetta...
2019-12-13 Iain Sandoe[Darwin, PPC] Use Darwin9 dylib header for Rosetta...
2019-12-13 Andrew StubbsSub-dword vector multiply for amdgcn
2019-12-13 Andrew StubbsSub-dword vector extend and truncate for amdgcn
2019-12-13 Dennis Zhang[AArch64] Enable CLI for Armv8.6-a: armv8.6-a, i8mm...
2019-12-13 Kewen Lin[rs6000] Adjust vectorization cost for scalar COND_EXPR
2019-12-13 Jakub Jelinekre PR target/92904 (varargs for __int128 is placed...
2019-12-12 Georg-Johann LayAdd support for some more AVR devices from avrxmega3...
2019-12-12 Vineet Gupta[ARC] generate signaling FDCMPF for hard float comparisons
2019-12-12 Claudiu Zissulescu[ARC] Use hardware support for double-precision compare...
2019-12-11 Jozef LawrynowiczMSP430: Add -fno-exceptions multilib
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