aarch64: Skip some SVE ACLE function-body tests for ILP32
[gcc.git] / gcc / config /
2020-01-23 Andrew PinskiFix patchable-function-entry on arc
2020-01-22 Jakub Jelinekaarch64: Fix aarch64_expand_subvti constant handling...
2020-01-22 Jakub Jelineki386: Fix up -fdollars-in-identifiers with identifiers...
2020-01-22 Andrew PinskiFix target/93119 (aarch64): ICE with traditional TLS...
2020-01-21 Jim WilsonRISC-V: Fix rtl checking enabled failure with -msave...
2020-01-21 H.J. Lui386: Do GNU2 TLS address computation in ptr_mode
2020-01-21 Jakub Jelinekriscv: Fix up riscv_rtx_costs for RTL checking (PR...
2020-01-21 Richard Sandifordaarch64: Use stdint types for SVE ACLE elements
2020-01-21 Richard Sandifordaarch64: Fix SVE ACLE handling of SImode pointers
2020-01-21 Szabolcs Nagy[AArch64] PR92424: Fix -fpatchable-function-entry=N...
2020-01-21 Martin LiskaRemove dead variable.
2020-01-21 Mihail Ionescu[PATCH, GCC/ARM] Fix clear_operation_p uninitialised...
2020-01-21 Jakub Jelinekpowerpc: Fix ICE with fp conditional move (PR target...
2020-01-21 Kito ChengRISC-V: Disallow regrenme if the TO register never...
2020-01-20 Wilco Dijkstra[AArch64] Set jump-align=4 for neoversen1
2020-01-20 H.J. Lux32: Add x32 support to -mtls-dialect=gnu2
2020-01-20 Wilco Dijkstra[AArch64] Set SLOW_BYTE_ACCESS
2020-01-20 Richard Sandifordaarch64: Remove parameter name and ATTRIBUTE_UNUSED
2020-01-18 Tamar ChristinaAArch64: Fix unused variable warning breaking bootstrap.
2020-01-18 Jakub Jelinekarm: Remove yet another unused variable.
2020-01-18 Jakub Jelinekarm: fix rtl checking bootstrap (PR target/93312)
2020-01-17 Mihail Ionescu[GCC/ARM, 2/2] Add support for ASRL(imm), LSLL(imm...
2020-01-17 Mihail Ionescu[GCC/ARM, 1/2] Add support for ASRL(reg) and LSLL(reg...
2020-01-17 Jakub Jelinekarm: Unbreak bootstrap
2020-01-17 Matthew Malcomson[AArch64] [Obvious] Correct pattern target requirement
2020-01-17 Matthew Malcomson[AArch64] [SVE] Implement svld1ro intrinsic.
2020-01-17 Matthew Malcomson[AArch64] Enable CLI for Armv8.6-A f64mm
2020-01-17 Wilco Dijkstra[AArch64] Enable compare branch fusion
2020-01-17 Wilco Dijkstra[AArch64] Fix shrinkwrapping interactions with atomics...
2020-01-17 Richard Sandifordaarch64: Don't raise FE_INVALID for -__builtin_isgreate...
2020-01-16 Stam Markianos-Wright[GCC][PATCH][ARM] Add Bfloat16_t scalar type, vector...
2020-01-16 Stam Markianos-Wright[GCC][PATCH][ARM] Add Bfloat16_t scalar type, vector...
2020-01-16 Mihail IonescuAdd CLI and multilib support for Armv8.1-M Mainline...
2020-01-16 Mihail Ionescu[PATCH, GCC/ARM, 10/10] Enable -mcmse
2020-01-16 Mihail Ionescu[PATCH, GCC/ARM, 9/10] Call nscall function with blxns
2020-01-16 Mihail Ionescu[PATCH, GCC/ARM, 8/10] Do lazy store & load inline...
2020-01-16 Mihail Ionescu[PATCH, GCC/ARM, 7/10] Clear all VFP regs inline in...
2020-01-16 Mihail Ionescu[PATCH, GCC/ARM, 6/10] Clear GPRs inline when calling...
2020-01-16 Mihail Ionescu[PATCH, GCC/ARM, 5/10] Clear VFP registers with VSCCLRM
2020-01-16 Mihail Ionescu[PATCH, GCC/ARM, 4/10] Clear GPR with CLRM
2020-01-16 Mihail Ionescu[PATCH, GCC/ARM, 3/10] Save/restore FPCXTNS in nsentry...
2020-01-16 Mihail Ionescu[PATCH, GCC/ARM, 2/10] Add command line support for...
2020-01-16 Stam Markianos-Wright[GCC][PATCH][AArch64]Add ACLE intrinsics for bfdot...
2020-01-16 Stam Markianos-Wright[GCC][PATCH][AArch64]Add ACLE intrinsics for dot produc...
2020-01-16 Richard Sandifordaarch64: Fix BE SVE mode punning involving floats
2020-01-15 Uros BizjakRemove invalid SSE2 ISA requirements in *movsf_internal.
2020-01-14 Jakub Jelineki386: Fix wrong-code x86 issue with avx512{f,vl} fma...
2020-01-14 Uros BizjakPR target/93254 - -msse generates sse2 instructions
2020-01-13 Andrew PinskiAdd initial octeontx2 support.
2020-01-10 Stam Markianos-Wrightaarch64.c (aarch64_invalid_conversion): New function...
2020-01-10 Stam Markianos-Wrightconfig.gcc: Add arm_bf16.h.
2020-01-10 Richard Sandiford[AArch64] Make -msve-vector-bits=128 generate VL-specif...
2020-01-10 Richard Sandiford[AArch64] Fix reversed vcond_mask invocation in aarch64...
2020-01-10 Richard Sandiford[AArch64] Tighten mode checks in aarch64_builtin_vector...
2020-01-09 Richard Sandiford[AArch64] Add support for the SVE2 ACLE
2020-01-09 Richard Sandiford[AArch64] Pass a mode to some SVE immediate queries
2020-01-09 Richard Sandiford[AArch64] Add banner comments to aarch64-sve2.md
2020-01-09 Richard Sandiford[AArch64] Simplify WHILERW and WHILEWR definition
2020-01-09 Richard Sandiford[AArch64] Rename UNSPEC_WHILE* to match instruction...
2020-01-09 Richard Sandiford[AArch64] Rename SVE shape "unary_count" to "unary_to_uint"
2020-01-09 Richard Sandiford[AArch64] Specify some SVE ACLE functions in a more...
2020-01-09 Richard Sandiford[AArch64] Tweak iterator usage for [SU]Q{ADD,SUB}
2020-01-09 Richard Sandiford[AArch64] Remove fictitious [SU]RHSUB instructions
2020-01-09 Richard SandifordAdd a compatible_vector_types_p target hook
2020-01-09 Jakub Jelinekre PR inline-asm/93202 ([RISCV] ICE when using inline...
2020-01-09 Jakub Jelinekre PR target/93141 (Missed optimization : Use of adc...
2020-01-09 Jim WilsonRISC-V: Disable use of TLS copy relocs.
2020-01-08 Jakub Jelinekre PR target/93187 (ICE in extract_insn, at recog.c...
2020-01-08 Jakub Jelinekre PR target/93174 (ICE building glibc __sha512_process...
2020-01-08 Georg-Johann LayAdd -nodevicespecs option for avr.
2020-01-08 Georg-Johann LayImplement 64-bit double functions.
2020-01-08 Richard Earnshawarm: Fix rmprofile multilibs when architecture includes...
2020-01-07 Michael MeissnerRevert patch accidentily created on the wrong sandbox
2020-01-07 Michael MeissnerRestore patch reverted on trunk instead of a branch
2020-01-07 Andrew Stubbs[amdgcn] Add more modes for vector comparisons
2020-01-07 Andrew StubbsDisallow 'B' constraints on amdgcn addc/subb
2020-01-07 Richard SandifordAdd a generic lhd_simulate_enum_decl
2020-01-07 Richard Sandiford[AArch64] Use type attributes to mark types that use...
2020-01-07 Michael MeissnerRefactor some code for a future change.
2020-01-07 Michael MeissnerUpdate 'Q' constraint documentation.
2020-01-07 Michael MeissnerFix bad code of vector extract of PC-relative address...
2020-01-07 Michael MeissnerAdd support for large prefixed address in adjusting...
2020-01-06 John David Anglinpa.md: Revert change to use ordered_comparison_operator...
2020-01-06 Andrew StubbsFix amdgcn issue with '0' constraints
2020-01-06 Bryan Stensonmips.c (vr4130_align_insns): Fix typo.
2020-01-06 Andrew StubbsFix early-clobber in amdgcn vec_extract
2020-01-06 Richard Sandiford[AArch64] Use move-if-change for aarch64-tune.md
2020-01-06 Richard Sandiford[AArch64] Fix constraints for CPY /M
2020-01-06 Andrew StubbsFix amdgcn inline immediate range
2020-01-05 Jakub Jelinekre PR target/93141 (Missed optimization : Use of adc...
2020-01-03 Jakub Jelinekre PR target/93089 (Force mprefer-vector-width=512...
2020-01-03 Jakub Jelinekre PR target/93089 (Force mprefer-vector-width=512...
2020-01-03 Jakub Jelinekre PR target/93110 (grub-2.04/grub-core/lib/division...
2020-01-02 Dennis Zhang[Arm] Enable CLI for Armv8.6-a: armv8.6-a, i8mm and...
2020-01-01 John David Anglinre PR target/67834 (Local references inside comdat...
2020-01-01 John David Anglinre PR target/93111 (FAIL: gfortran.fortran-torture...
2020-01-01 Jakub JelinekUpdate copyright years.
2019-12-30 Olivier HainqueArrange to preinclude yvals.h ahead of stdint on VxWorks 7
2019-12-30 Olivier HainqueAdd missing file expected with rev 279781
2019-12-30 Olivier HainqueAdd missing files expected with rev 279784
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