Connect dramcore to SoC bus in ECPIX-5 example
[gram.git] / gram / dfii.py
2020-06-08 Jean THOMASUse CSRPrefixProxy for exposing CSR
2020-06-08 Jean THOMASRemove setaddr for submodule instanciation
2020-06-04 Jean THOMASCorrect nMigen transition bugs
2020-06-03 Jean THOMASInitial commit