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Fix CRG, revert to resetful sync domain
[gram.git] / gram / simulation / runsimsoc.sh
2020-06-29 Jean THOMASAdd -Wall to simulations blob | commitdiff | raw
2020-06-26 Jean THOMASUse FST instead of VCD blob | commitdiff | raw | diff to current
2020-06-26 Jean THOMASAdd DDRSoC simulation blob | commitdiff | raw | diff to current