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Backport modifications from example's CRG
[gram.git] / gram / simulation /
2020-07-16 Jean THOMASBackport modifications from example's CRG tree | commitdiff
2020-07-15 Jean THOMASMake Micron model read the mem_init.txt file tree | commitdiff
2020-07-15 Jean THOMASMake gram simulations faster tree | commitdiff
2020-07-15 Jean THOMASAdd initial memory content tree | commitdiff
2020-07-15 Jean THOMASIncrease UART bridge speed in simulation, decrease... tree | commitdiff
2020-07-15 Jean THOMASLog RAM signals tree | commitdiff
2020-07-13 Jean THOMASReduce POR duration tree | commitdiff
2020-07-13 Jean THOMASFix gearing and UART speed tree | commitdiff
2020-07-13 Jean THOMASAdd additional opt+clean and print stats tree | commitdiff
2020-07-10 Jean THOMASFix timings in simulation to prevent tDLLK errors tree | commitdiff
2020-07-10 Jean THOMASAdd POR start/end logging in simsoc testbench tree | commitdiff
2020-07-08 Jean THOMASMatch ECPIX-5 DRAM parameters in Micron's model tree | commitdiff
2020-07-08 Jean THOMASFix clock input tree | commitdiff
2020-07-08 Jean THOMAScke => clk_en in SoC testbench tree | commitdiff
2020-07-07 Jean THOMASFix CRG PLL parameters (fixing #23) tree | commitdiff
2020-07-06 Jean THOMASRename from cke to clk_en tree | commitdiff
2020-07-06 Jean THOMASAdd write transactions in the simulation testbench tree | commitdiff
2020-07-03 Jean THOMASUpdate CRG with parameters that work IRL tree | commitdiff
2020-07-03 Jean THOMASInvert condition in runsimcrg.sh tree | commitdiff
2020-07-03 Jean THOMASCheck if YOSYS env var is set and use it as YOSYS execu... tree | commitdiff
2020-07-03 Jean THOMASExclude DDRDLLA from tree tree | commitdiff
2020-07-03 Jean THOMASEnsure dramsync runs at 100Mhz, sync2x at 200Mhz tree | commitdiff
2020-07-03 Jean THOMASRemove DDRDLLA tree | commitdiff
2020-07-03 Jean THOMASUpdate simulation gitignore tree | commitdiff
2020-07-03 Jean THOMASUpdate gram simulation documentation tree | commitdiff
2020-07-03 Jean THOMASAdd cleaning pass tree | commitdiff
2020-07-03 Jean THOMASRework CRG simulation tree | commitdiff
2020-07-03 Jean THOMASExternalize CRG into its own file tree | commitdiff
2020-07-02 Jean THOMASFlatten specific parts of the designs tree | commitdiff
2020-07-02 Jean THOMASAdd missing command issue strobe for ZQ calibration tree | commitdiff
2020-07-02 Jean THOMASFix register addresses, add missing command_issue strobe tree | commitdiff
2020-07-02 Jean THOMASAdd DDRDLLA patch tree | commitdiff
2020-07-01 Jean THOMASFix merge tree | commitdiff
2020-07-01 Jean THOMASRework indentation and add Wishbone tests tree | commitdiff
2020-07-01 Jean THOMASAdd Wishbone interaction code tree | commitdiff
2020-07-01 Jean THOMASAdd Wishbone interaction code tree | commitdiff
2020-07-01 Jean THOMASFix Iverilog simulation tree | commitdiff
2020-07-01 Jean THOMASGenerate ilang file tree | commitdiff
2020-06-30 Jean THOMASBuild nMigen gateware in a specific folder tree | commitdiff
2020-06-30 Jean THOMASRemove LED code in CRG tree | commitdiff
2020-06-30 Jean THOMASRemove Minerva dependency tree | commitdiff
2020-06-29 Jean THOMASDefine simulation time as a parameter tree | commitdiff
2020-06-29 Jean THOMASDefine PLL's PHASELOADREG input tree | commitdiff
2020-06-29 Jean THOMASUse -n option in vvp to enable CTRL+C tree | commitdiff
2020-06-29 Jean THOMASFix PLL instanciation code for CRG simulation tree | commitdiff
2020-06-29 Jean THOMASDump whole module tree | commitdiff
2020-06-29 Jean THOMASSet DRAM's CK_N to low tree | commitdiff
2020-06-29 Jean THOMASFix CRG, revert to resetful sync domain tree | commitdiff
2020-06-29 Jean THOMASSet UART RX to 1'b1 tree | commitdiff
2020-06-29 Jean THOMASAdd -Wall to simulations tree | commitdiff
2020-06-26 Jean THOMASAdd testbench for SoC simulation tree | commitdiff
2020-06-26 Jean THOMASUse FST instead of VCD tree | commitdiff
2020-06-26 Jean THOMASExclude .fst files tree | commitdiff
2020-06-26 Jean THOMASAdd DDRSoC simulation tree | commitdiff
2020-06-26 Jean THOMASAdd gitignore for simulation folder tree | commitdiff
2020-06-26 Jean THOMASFix PLL code tree | commitdiff
2020-06-26 Jean THOMASAdd DRAM model tree | commitdiff
2020-06-25 Jean THOMASFix typo tree | commitdiff
2020-06-25 Jean THOMASAdd simulation code tree | commitdiff