2020-07-27 |
Jean THOMAS | Fix wrong T1 signal |
tree | commitdiff |
2020-07-27 |
Jean THOMAS | Add comment |
tree | commitdiff |
2020-07-27 |
Jean THOMAS | Add Precharge-For-Refresh state |
tree | commitdiff |
2020-07-27 |
Jean THOMAS | Remove reference to UART |
tree | commitdiff |
2020-07-27 |
Jean THOMAS | Wire directly to the Wishbone bus, making simulations... |
tree | commitdiff |
2020-07-24 |
Jean THOMAS | Remove unnecessary modules in gram tests |
tree | commitdiff |
2020-07-24 |
Jean THOMAS | Add test for tFAWController |
tree | commitdiff |
2020-07-24 |
Jean THOMAS | Fix tXXDController (was overflowing) |
tree | commitdiff |
2020-07-24 |
Jean THOMAS | Fix code styling |
tree | commitdiff |
2020-07-24 |
Jean THOMAS | Removing superfluous variables in multiplexer |
tree | commitdiff |
2020-07-24 |
Jean THOMAS | Remove commented test |
tree | commitdiff |
2020-07-24 |
Jean THOMAS | Fix code styling |
tree | commitdiff |
2020-07-24 |
Jean THOMAS | Fix AntiStarvation |
tree | commitdiff |
2020-07-24 |
Jean THOMAS | Use the correct value for test depth |
tree | commitdiff |
2020-07-23 |
Jean THOMAS | Revert to timings from LiteDRAM |
tree | commitdiff |
2020-07-23 |
Jean THOMAS | Fix code styling |
tree | commitdiff |
2020-07-23 |
Jean THOMAS | Fix burstdet CSR code |
tree | commitdiff |
2020-07-23 |
Jean THOMAS | Fix platform code for simulation |
tree | commitdiff |
2020-07-22 |
Jean THOMAS | Remove DQSPattern import |
tree | commitdiff |
2020-07-22 |
Jean THOMAS | Remove unnecessary signal reset |
tree | commitdiff |
2020-07-22 |
Jean THOMAS | Rework burstdet CSR code |
tree | commitdiff |
2020-07-22 |
Jean THOMAS | Fix granularity and sel in UARTBridge |
tree | commitdiff |
2020-07-21 |
Jean THOMAS | Rework CSR interface for PHY |
tree | commitdiff |
2020-07-21 |
Jean THOMAS | Use 0x00BA0BAB instead of 0x12345678 for better readability |
tree | commitdiff |
2020-07-21 |
Jean THOMAS | Fix write timings |
tree | commitdiff |
2020-07-21 |
Jean THOMAS | Replace Switch with If statement, indentation fixup |
tree | commitdiff |
2020-07-20 |
Jean THOMAS | Remove DQSPattern |
tree | commitdiff |
2020-07-20 |
Jean THOMAS | Apply changes from LiteDRAM#fa7d91a |
tree | commitdiff |
2020-07-20 |
Jean THOMAS | Fix code styling |
tree | commitdiff |
2020-07-20 |
Jean THOMAS | Adding test for tXXDController |
tree | commitdiff |
2020-07-20 |
Jean THOMAS | Add simple test for DQSPattern |
tree | commitdiff |
2020-07-20 |
Jean THOMAS | Simplify parameters code for DQSPattern |
tree | commitdiff |
2020-07-20 |
Jean THOMAS | Remove unused code (PHYPadsCombiner/PHYPadsReducer) |
tree | commitdiff |
2020-07-20 |
Jean THOMAS | Fix code styling |
tree | commitdiff |
2020-07-20 |
Jean THOMAS | Remove useless signal |
tree | commitdiff |
2020-07-20 |
Jean THOMAS | Use PinsN when possible (fixes #27) |
tree | commitdiff |
2020-07-20 |
Jean THOMAS | Simplify PHY read code |
tree | commitdiff |
2020-07-17 |
Jean THOMAS | Use XDR for RAS#, CAS#, WE#, CLK_EN and ODT |
tree | commitdiff |
2020-07-17 |
Jean THOMAS | Code cleaning in ECP5 PHY |
tree | commitdiff |
2020-07-17 |
Jean THOMAS | Use XDR for ba pins |
tree | commitdiff |
2020-07-17 |
Jean THOMAS | Use XDR for address pins |
tree | commitdiff |
2020-07-17 |
Jean THOMAS | Fix when there are multiple clocks |
tree | commitdiff |
2020-07-17 |
Jean THOMAS | Use nMigen's XDR for DDR clk |
tree | commitdiff |
2020-07-17 |
Jean THOMAS | Remove unused signal |
tree | commitdiff |
2020-07-17 |
Jean THOMAS | Fix code styling |
tree | commitdiff |
2020-07-17 |
Jean THOMAS | Remove adaptation code |
tree | commitdiff |
2020-07-17 |
Jean THOMAS | Remove get_port() function |
tree | commitdiff |
2020-07-17 |
Jean THOMAS | Add test for _AntiStarvation timer duration |
tree | commitdiff |
2020-07-17 |
Jean THOMAS | Fix code styling |
tree | commitdiff |
2020-07-17 |
Jean THOMAS | Use the right domain |
tree | commitdiff |
2020-07-17 |
Jean THOMAS | Fix PHY issues |
tree | commitdiff |
2020-07-17 |
Jean THOMAS | Reduce delay between wishbone_write |
tree | commitdiff |
2020-07-17 |
Jean THOMAS | Log DRAM commands |
tree | commitdiff |
2020-07-17 |
Jean THOMAS | Put proc_rmdead after proc_mux |
tree | commitdiff |
2020-07-17 |
Jean THOMAS | Name each BankMachine instance to improve VCD output |
tree | commitdiff |
2020-07-17 |
Jean THOMAS | Fix DQS_N errors |
tree | commitdiff |
2020-07-17 |
Jean THOMAS | Add more read transactions, add checks, ASAP |
tree | commitdiff |
2020-07-17 |
Jean THOMAS | Remove event in ECP5DDRPHY |
tree | commitdiff |
2020-07-17 |
Jean THOMAS | Remove comment |
tree | commitdiff |
2020-07-16 |
Jean THOMAS | Use assertions in simsoc testbench |
tree | commitdiff |
2020-07-16 |
Jean THOMAS | Add logging and delays to the simulation to make it... |
tree | commitdiff |
2020-07-16 |
Jean THOMAS | Tweak yosys script |
tree | commitdiff |
2020-07-16 |
Jean THOMAS | Backport modifications from example's CRG |
tree | commitdiff |
2020-07-15 |
Jean THOMAS | Write logic equivalences in a clearer way |
tree | commitdiff |
2020-07-15 |
Jean THOMAS | Make Micron model read the mem_init.txt file |
tree | commitdiff |
2020-07-15 |
Jean THOMAS | Make gram simulations faster |
tree | commitdiff |
2020-07-15 |
Jean THOMAS | Add initial memory content |
tree | commitdiff |
2020-07-15 |
Jean THOMAS | Increase UART bridge speed in simulation, decrease... |
tree | commitdiff |
2020-07-15 |
Jean THOMAS | Log RAM signals |
tree | commitdiff |
2020-07-15 |
Jean THOMAS | Fix code styling |
tree | commitdiff |
2020-07-13 |
Jean THOMAS | Make _AddressSlicer an elaboratable |
tree | commitdiff |
2020-07-13 |
Jean THOMAS | Update amount of tests |
tree | commitdiff |
2020-07-13 |
Jean THOMAS | Remove unnecessary arbiter |
tree | commitdiff |
2020-07-13 |
Jean THOMAS | Fix timings in libgram |
tree | commitdiff |
2020-07-13 |
Jean THOMAS | Reduce POR duration |
tree | commitdiff |
2020-07-13 |
Jean THOMAS | Fix gearing and UART speed |
tree | commitdiff |
2020-07-13 |
Jean THOMAS | Add additional opt+clean and print stats |
tree | commitdiff |
2020-07-13 |
Jean THOMAS | Make full use of the native port |
tree | commitdiff |
2020-07-13 |
Jean THOMAS | Fix gearing |
tree | commitdiff |
2020-07-13 |
Jean THOMAS | Fix FakePHY bank emulation |
tree | commitdiff |
2020-07-13 |
Jean THOMAS | Remove UnusedElaboratable warning |
tree | commitdiff |
2020-07-10 |
Jean THOMAS | Fix memtest tests (missing parenthesis) |
tree | commitdiff |
2020-07-10 |
Jean THOMAS | Add more memory tests |
tree | commitdiff |
2020-07-10 |
Jean THOMAS | Fix code styling |
tree | commitdiff |
2020-07-10 |
Jean THOMAS | Add a name to timing_checker submodule |
tree | commitdiff |
2020-07-10 |
Jean THOMAS | Improve simulation output: add names to submodules |
tree | commitdiff |
2020-07-10 |
Jean THOMAS | Don't test for tREFI=1 in RefreshTimer |
tree | commitdiff |
2020-07-10 |
Jean THOMAS | Add more R/W operations in test_soc |
tree | commitdiff |
2020-07-10 |
Jean THOMAS | Fix formal checks for RefreshTimer |
tree | commitdiff |
2020-07-10 |
Jean THOMAS | Fix tests for _AntiStarvation |
tree | commitdiff |
2020-07-10 |
Jean THOMAS | Fix code styling |
tree | commitdiff |
2020-07-10 |
Jean THOMAS | Rename VCD file output |
tree | commitdiff |
2020-07-10 |
Jean THOMAS | Rename tests, add interleaved read/write test |
tree | commitdiff |
2020-07-10 |
Jean THOMAS | Implement a memory in the bank simulator, check for... |
tree | commitdiff |
2020-07-10 |
Jean THOMAS | Fix timings in simulation to prevent tDLLK errors |
tree | commitdiff |
2020-07-10 |
Jean THOMAS | Add POR start/end logging in simsoc testbench |
tree | commitdiff |
2020-07-09 |
Jean THOMAS | Add test for SoC readout |
tree | commitdiff |
2020-07-09 |
Jean THOMAS | Disable Assert statements until they are natively suppo... |
tree | commitdiff |
2020-07-09 |
Jean THOMAS | Comment buggy assertions |
tree | commitdiff |
2020-07-09 |
Jean THOMAS | Add imports for Assert & Assume in FakePHY |
tree | commitdiff |
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