[binutils, ARM, 1/16] Add support for Armv8.1-M Mainline CLI
[binutils-gdb.git] / include / opcode / riscv.h
2019-01-01 Alan ModraUpdate year range in copyright notice of binutils files
2018-12-06 Andrew Burgessopcodes/riscv: Hide '.L0 ' fake symbols
2018-12-03 Jim WilsonRISC-V: Accept version, supervisor ext and more than...
2018-11-27 Jim WilsonRISC-V: Add .insn CA support.
2018-08-30 Jim WilsonRISC-V: Allow instruction require more than one extension
2018-07-30 Jim WilsonRISC-V: Set insn info fields correctly when disassembling.
2018-03-14 Jim WilsonRISC-V: Add .insn support.
2018-01-03 Alan ModraUpdate year range in copyright notice of binutils files
2017-10-24 Andrew WatermanRISC-V: Only relax to C.LUI when imm != 0 and rd !...
2017-01-03 Kito ChengAdd support for the Q extension to the RISCV ISA.
2017-01-02 Alan ModraUpdate year range in copyright notice of all files.
2016-11-01 Nick CliftonAdd support for RISC-V architecture.