libctf, link: add the ability to filter out variables from the link
[binutils-gdb.git] / include / opcode /
2020-06-30 Nelson ChuRISC-V: Support debug and float CSR as the unprivileged...
2020-06-30 Nelson ChuRISC-V: Cleanup the include/opcode/riscv-opc.h.
2020-06-22 Alex Coplanaarch64: Normalize and sort feature bit macros
2020-06-22 Nelson ChuRISC-V: Report warning when linking the objects with...
2020-06-12 Nelson ChuRISC-V: Drop the privileged spec v1.9 support.
2020-06-11 Alex Coplan[PATCH]: aarch64: Refactor representation of system...
2020-06-04 Jose E. Marchesiopcodes: discriminate endianness and insn-endianness...
2020-06-04 Jose E. Marchesiopcodes: support insn endianness in cgen_cpu_open
2020-06-03 Nelson ChuRISC-V: Fix the error when building RISC-V linux native...
2020-05-28 Alan ModraPR26044, Some targets can't be compiled with GCC 10...
2020-05-20 Nelson Chu[PATCH v2 0/9] RISC-V: Support version controling for...
2020-05-19 Alexander FedotovFix the ARM assembler to generate a Realtime profile...
2020-05-11 Alan ModraPower10 Reduced precision outer product operations
2020-05-11 Alan ModraPowerPC Rename powerxx to power10
2020-04-30 Alex CoplanAArch64: add GAS support for UDF instruction
2020-03-30 Nelson ChuRISC-V: Update CSR to privileged spec 1.11.
2020-02-21 Nelson ChuRISC-V: Support the ISA-dependent CSR checking.
2020-02-10 Matthew Malcomson[binutils][arm] arm support for ARMv8.m Custom Datapath...
2020-02-04 Alan Modraubsan: d30v: negation of -2147483648
2020-01-16 Andre Vieira[binutils][arm] PR25376 Change MVE into a CORE_HIGH...
2020-01-15 Jozef LawrynowiczMSP430: Fix relocation overflow when using #lo(EXP...
2020-01-13 Alan Modratic4x: sign extension using shifts
2020-01-10 Alan Modraubsan: spu: left shift of negative value
2020-01-07 Shahab Vahedi[ARC] Add finer details for LLOCK and SCOND
2020-01-02 Nick CliftonEnable building the s12z target on Solaris hosts where...
2020-01-01 Alan ModraUpdate year range in copyright notice of binutils files
2019-12-17 Alan ModraRemove tic80 support
2019-12-16 Alan Modraubsan: crx: left shift cannot be represented in type...
2019-12-16 Alan Modraubsan: nds32: left shift cannot be represented in type...
2019-12-11 Alan Modrabfd signed overflow fixes
2019-12-11 Alan Modraubsan: left shift of cannot be represented in type...
2019-12-05 Jan BeulichArm64: simplify Crypto arch extension handling
2019-11-22 Mihail IonescuArm: Change CRC from fpu feature to archititectural...
2019-11-07 Matthew Malcomson[Patch][binutils][arm] Armv8.6-A Matrix Multiply exten...
2019-11-07 Matthew Malcomson[binutils][aarch64] Matrix Multiply extension enablemen...
2019-11-07 Matthew Malcomson[binutils][arm] BFloat16 enablement [4/X]
2019-11-07 Matthew Malcomson[binutils][aarch64] Bfloat16 enablement [2/X]
2019-11-07 Matthew Malcomson[gas][aarch64] Armv8.6-a option [1/X]
2019-09-18 Jim WilsonRISC-V: Gate opcode tables by enum rather than string.
2019-08-30 Claudiu Zissulescu[ARC] [COMMITTED] Fix FASTMATH field.
2019-08-08 Yoshinori SatoUpdate the handling of shift rotate and load/store...
2019-07-24 Claudiu Zissulescu[ARC] Update ARC opcode table
2019-07-16 Jan Beulichx86: fold SReg{2,3}
2019-07-01 Matthew Malcomson[gas][aarch64][SVE2] Fix pmull{t,b} requirement on...
2019-05-24 Peter BergnerPowerPC add initial -mfuture instruction support
2019-05-16 Andre Vieira[PATCH 1/57][Arm][GAS]: Add support for +mve and +mve.fp
2019-05-09 Matthew Malcomson[binutils][aarch64] New SVE_SHLIMM_UNPRED_22 operand.
2019-05-09 Matthew Malcomson[binutils][aarch64] New sve_size_tsz_bhs iclass.
2019-05-09 Matthew Malcomson[binutils][aarch64] New SVE_Zm4_11_INDEX operand.
2019-05-09 Matthew Malcomson[binutils][aarch64] New sve_shift_tsz_bhsd iclass.
2019-05-09 Matthew Malcomson[binutils][aarch64] New SVE_SHRIMM_UNPRED_22 operand.
2019-05-09 Matthew Malcomson[binutils][aarch64] New sve_size_013 iclass.
2019-05-09 Matthew Malcomson[binutils][aarch64] New sve_size_bh iclass.
2019-05-09 Matthew Malcomson[binutils][aarch64] New sve_size_sd2 iclass.
2019-05-09 Matthew Malcomson[binutils][aarch64] New SVE_ADDR_ZX operand.
2019-05-09 Matthew Malcomson[binutils][aarch64] New SVE_Zm3_11_INDEX operand.
2019-05-09 Matthew Malcomson[binutils][aarch64] New iclass sve_size_hsd2.
2019-05-09 Matthew Malcomson[binutils][aarch64] Introduce SVE_IMM_ROT3 operand.
2019-05-09 Matthew Malcomson[binutils][aarch64] SVE2 feature extension flags.
2019-05-06 Faraz ShahbazkerAdd load-link, store-conditional paired EVA instructions
2019-05-01 Sudakshina Das[BINUTILS, AArch64] Enable Transactional Memory Extension
2019-04-27 Andrew Bennett[MIPS] Add load-link, store-conditional paired instructions
2019-04-25 Maciej W. RozyckiMIPS/include: opcode/mips.h: Update stale comment for...
2019-04-15 Andre Vieira[binutils, ARM, 1/16] Add support for Armv8.1-M Mainlin...
2019-04-11 Sudakshina Das[BINUTILS, AArch64, 2/2] Update Store Allocation Tag...
2019-04-01 Andre Vieira[GAS, Arm] CLI with architecture sensitive extensions
2019-03-28 Alan ModraPR24390, Don't decode mtfsb field as a cr field
2019-01-31 Andreas KrebbelS/390: Implement instruction set extensions
2019-01-25 Sudi DasAArch64: Remove ldgv and stgv instructions from Armv8...
2019-01-05 Yoshinori SatoRX: include - Add RXv3 support.
2019-01-01 Alan ModraUpdate year range in copyright notice of binutils files
2018-12-28 Alan ModraPR24028, PPC_INT_FMT
2018-12-06 Alan ModraPowerPC @l, @h and @ha warnings, plus VLE e_li
2018-12-06 Andrew Burgessopcodes/riscv: Hide '.L0 ' fake symbols
2018-12-03 Jim WilsonRISC-V: Accept version, supervisor ext and more than...
2018-11-27 Jim WilsonRISC-V: Add .insn CA support.
2018-11-13 Thomas Preud'homme[ARM] Improve indentation of ARM architecture declarations
2018-11-12 Sudakshina Das[BINUTILS, AARCH64, 6/8] Add Tag getting instruction...
2018-11-12 Sudakshina Das[BINUTILS, AARCH64, 4/8] Add Tag setting instructions...
2018-11-12 Sudakshina Das[BINUTILS, AARCH64, 2/8] Add Tag generation instruction...
2018-11-12 Sudakshina Das[BINUTILS, AARCH64, 1/8] Add support for Memory Tagging...
2018-11-06 Sudakshina Das[BINUTILS, ARM] Add Armv8.5-A to select_arm_features...
2018-10-09 Sudakshina Das[PATCH, BINUTULS, AARCH64, 9/9] Add SSBS to MSR/MRS
2018-10-09 Sudakshina Das[PATCH, BINUTILS, AARCH64, 8/9] Add SCXTNUM_ELx and...
2018-10-09 Sudakshina Das[PATCH, BINUTILS, AARCH64, 7/9] Add BTI instruction
2018-10-09 Sudakshina Das[PATCH, BINUTILS, AARCH64, 6/9] Add Random number instr...
2018-10-09 Sudakshina Das[PATCH, BINUTILS, AARCH64, 5/9] Add DC CVADP instruction
2018-10-09 Sudakshina Das[PATCH, BINUTILS, AARCH64, 4/9] Add Execution and Data...
2018-10-09 Sudakshina Das[PATCH, BINUTILS, AARCH64, 3/9] Add instruction SB...
2018-10-09 Sudakshina Das[PATCH, BINUTILS, AARCH64, 2/9] Add Data procoessing...
2018-10-09 Sudakshina Das[PATCH, BINUTILS, AARCH64, 1/9] Add -march=armv8.5...
2018-10-05 Sudakshina Das[Arm, 3/3] Add Execution and Data Prediction instructio...
2018-10-05 Sudakshina Das[Arm, 2/3] Add instruction SB for AArch32
2018-10-05 Sudakshina Das[Arm, 1/3] Add -march=armv8.5-a and related internal...
2018-10-03 Tamar ChristinaAArch64: Add SVE constraints verifier.
2018-10-03 Tamar ChristinaAArch64: Refactor verifiers to make more general.
2018-10-03 Tamar ChristinaAArch64: Refactor err_type.
2018-10-03 Tamar ChristinaAArch64: Wire through instr_sequence
2018-10-03 Tamar ChristinaAArch64: Mark sve instructions that require MOVPRFX...
2018-10-02 Palmer DabbeltRISC-V: Add fence.tso instruction
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