2019-08-18 |
Miodrag Milanovic | Merge remote-tracking branch 'upstream/master' into... |
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2019-08-18 |
whitequark | Merge branch 'master' into eddie/pr1266_again |
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2019-08-17 |
Clifford Wolf | Merge pull request #1283 from YosysHQ/clifford/fix1255 |
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2019-08-17 |
Clifford Wolf | Merge pull request #1303 from YosysHQ/bogdanvuk/opt_share |
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2019-08-17 |
Clifford Wolf | Merge pull request #1300 from YosysHQ/eddie/cleanup2 |
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2019-08-16 |
Eddie Hung | Merge pull request #1250 from bwidawsk/master |
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2019-08-16 |
Eddie Hung | Merge https://github.com/bogdanvuk/yosys into bogdanvuk... |
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2019-08-15 |
Eddie Hung | Use more ID::{A,B,Y,blackbox,whitebox} |
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2019-08-15 |
Clifford Wolf | Merge branch 'master' into clifford/fix1255 |
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2019-08-15 |
Eddie Hung | Merge remote-tracking branch 'origin/master' into eddie... |
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2019-08-15 |
Clifford Wolf | Merge pull request #1275 from YosysHQ/clifford/ids |
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2019-08-15 |
Clifford Wolf | Merge branch 'master' into clifford/ids |
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2019-08-12 |
Serge Bazanski | Merge pull request #1152 from 1138-4EB/feat-docker |
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2019-08-12 |
Eddie Hung | Merge remote-tracking branch 'origin/master' into eddie... |
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2019-08-11 |
Clifford Wolf | Use ID() in kernel/*, add simple ID:: hack (to be impro... |
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2019-08-10 |
Clifford Wolf | Merge pull request #1258 from YosysHQ/eddie/cleanup |
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2019-08-07 |
Eddie Hung | RTLIL::S{0,1} -> State::S{0,1} for headers |
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2019-08-07 |
Jim Lawson | Merge branch 'master' into firrtl_err_on_unsupported_cell |
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2019-08-07 |
Clifford Wolf | Merge pull request #1240 from ucb-bar/firrtl-properties... |
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2019-08-07 |
Clifford Wolf | Merge pull request #1249 from mmicko/anlogic_fix |
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2019-08-07 |
David Shah | Merge pull request #1241 from YosysHQ/clifford/jsonfix |
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2019-08-06 |
Eddie Hung | Merge remote-tracking branch 'origin/master' into eddie... |
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2019-08-06 |
Clifford Wolf | Merge pull request #1251 from YosysHQ/clifford/nmux |
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2019-08-06 |
Clifford Wolf | Add $_NMUX_, add "abc -g cmos", add proper cmos cell... |
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2019-06-13 |
Eddie Hung | Move ConstEvalAig to aigerparse.cc |
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2019-06-13 |
Eddie Hung | More slimming |
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2019-06-13 |
Eddie Hung | Add ConstEvalAig specialised for AIGs |
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2019-03-28 |
Benedikt Tutzer | Merge remote-tracking branch 'origin/master' into featu... |
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2018-12-18 |
Jim Lawson | Merge remote-tracking branch 'upstream/master' |
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2018-12-16 |
Clifford Wolf | Merge pull request #704 from webhat/feature/fix-awk |
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2018-12-05 |
Clifford Wolf | Merge pull request #709 from smunaut/issue_708 |
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2018-12-04 |
Clifford Wolf | Merge pull request #702 from smunaut/min_ce_use |
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2018-12-01 |
Clifford Wolf | Merge pull request #676 from rafaeltp/master |
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2018-11-29 |
Clifford Wolf | Improve ConstEval error handling for non-eval cell... |
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2017-04-05 |
Clifford Wolf | Add ConstEval defaultval feature |
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2016-07-08 |
Clifford Wolf | Merge branch 'yosys-0.5-vtr' of https://github.com... |
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2015-07-02 |
Clifford Wolf | Fixed trailing whitespaces |
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2015-04-03 |
Ahmed Irfan | Merge branch 'master' of https://github.com/cliffordwol... |
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2014-10-10 |
Clifford Wolf | Renamed SIZE() to GetSize() because of name collision... |
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2014-09-27 |
Clifford Wolf | namespace Yosys |
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2014-09-22 |
Ahmed Irfan | Merge branch 'master' of https://github.com/cliffordwol... |
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2014-09-08 |
Clifford Wolf | Simplified $fa undef model |
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2014-09-08 |
Clifford Wolf | Added $lcu cell type |
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2014-09-08 |
Clifford Wolf | Added "$fa" cell type |
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2014-09-06 |
Clifford Wolf | Added $macc eval model |
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2014-09-03 |
Clifford Wolf | Fixes in $alu SAT- and eval-models |
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2014-09-01 |
Clifford Wolf | Added ConstEval model for $alu cells |
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2014-08-16 |
Clifford Wolf | Added additional gate types: $_NAND_ $_NOR_ $_XNOR_... |
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2014-08-14 |
Clifford Wolf | RIP $safe_pmux |
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2014-07-31 |
Clifford Wolf | Renamed port access function on RTLIL::Cell, added... |
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2014-07-28 |
Clifford Wolf | Using log_assert() instead of assert() |
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2014-07-26 |
Clifford Wolf | Refactoring: Renamed RTLIL::Module::cells to cells_ |
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2014-07-26 |
Clifford Wolf | Added RTLIL::Cell::has(portname) |
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2014-07-26 |
Clifford Wolf | Merge automatic and manual code changes for new cell... |
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2014-07-26 |
Clifford Wolf | Changed users of cell->connections_ to the new API... |
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2014-07-26 |
Clifford Wolf | Renamed RTLIL::{Module,Cell}::connections to connections_ |
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2014-07-24 |
Clifford Wolf | Replaced more old SigChunk programming patterns |
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2014-07-23 |
Clifford Wolf | Removed RTLIL::SigSpec::expand() method |
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2014-07-22 |
Clifford Wolf | SigSpec refactoring: change RTLIL::SigSpec::chunks... |
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2014-07-22 |
Clifford Wolf | SigSpec refactoring: using the accessor functions every... |
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2014-07-22 |
Clifford Wolf | SigSpec refactoring: renamed chunks and width to __chun... |
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2014-01-14 |
Ahmed Irfan | Merge branch 'master' of https://github.com/ahmedirfan1... |
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2014-01-03 |
Clifford Wolf | Fixed SAT and ConstEval undef handling for $pmux and... |
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2013-11-06 |
Clifford Wolf | Fixed handling of undef values in MUX select input... |
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2013-01-05 |
Clifford Wolf | initial import |
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