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Recognize registers and set initial state for them in tb
[yosys.git]
/
kernel
/
fstdata.h
2022-03-16
Miodrag Milanovic
Recognize registers and set initial state for them...
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2022-03-14
Claire Xen
Merge pull request #3213 from antonblanchard/abc-typo
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2022-03-07
Miodrag Milanović
Merge pull request #3210 from rqou/json-signed
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2022-03-04
Miodrag Milanović
Merge pull request #3186 from nakengelhardt/smtbmc_sby_...
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2022-03-04
Miodrag Milanović
Merge pull request #3206 from YosysHQ/micko/quote_remove
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2022-03-04
Miodrag Milanović
Merge pull request #3207 from nakengelhardt/json_escape...
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2022-03-04
Miodrag Milanović
Merge pull request #3219 from YosysHQ/micko/quick_vcd
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2022-02-28
Miodrag Milanovic
VCD reader support by using external tool
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2022-02-22
Claire Xen
Merge pull request #3197 from YosysHQ/claire/smtbmcfix
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2022-02-21
Miodrag Milanović
Merge pull request #3203 from YosysHQ/micko/sim_ff
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2022-02-16
Miodrag Milanovic
Add support for various ff/latch cells simulation
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2022-02-11
Miodrag Milanović
Merge pull request #3164 from zachjs/fix-ast-warn
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2022-02-11
Claire Xen
Merge branch 'master' into clk2ff-better-names
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2022-02-11
Claire Xen
Merge pull request #2019 from boqwxp/glift
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2022-02-07
Miodrag Milanović
Merge pull request #3185 from YosysHQ/micko/co_sim
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2022-01-31
Miodrag Milanovic
Display simulation time data
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2022-01-28
Miodrag Milanovic
cleanup
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2022-01-28
Miodrag Milanovic
Do actual compare
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2022-01-28
Miodrag Milanovic
Add more options and time handling
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2022-01-26
Miodrag Milanovic
Fix tabs/spaces
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2022-01-26
Miodrag Milanovic
Add fstdata helper class
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