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ice40: Adapt the relut process passes to the new $lut <=> SB_LUT4 port map
[yosys.git]
/
kernel
/
macc.h
2016-07-08
Clifford Wolf
Merge branch 'yosys-0.5-vtr' of https://github.com...
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2015-12-07
Clifford Wolf
Merge pull request #108 from cseed/master
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2015-10-25
Clifford Wolf
Import more std:: stuff into Yosys namespace
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2015-07-02
Clifford Wolf
Fixed trailing whitespaces
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2015-04-03
Ahmed Irfan
Merge branch 'master' of https://github.com/cliffordwol...
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2015-01-24
Clifford Wolf
Added ENABLE_NDEBUG makefile options
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2014-10-10
Clifford Wolf
Renamed SIZE() to GetSize() because of name collision...
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2014-10-03
Clifford Wolf
added resource sharing of $macc cells
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2014-09-22
Ahmed Irfan
Merge branch 'master' of https://github.com/cliffordwol...
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2014-09-15
Clifford Wolf
Added the obvious optimizations to alumacc $macc generator
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2014-09-06
Clifford Wolf
Added $macc cell type
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