rtlil: Make Process handling more uniform with Cell and Wire.
[yosys.git] / kernel / rtlil.cc
2021-07-11 Marcelina Kościelnickartlil: Make Process handling more uniform with Cell...
2021-06-14 Rupert SwarbrickSimplify some RTLIL destructors
2021-06-09 Marcelina Kościelnickaopt_expr: Fix mul/div/mod by POT patterns to support...
2021-06-09 Claire XenMerge pull request #2817 from YosysHQ/claire/fixemails
2021-06-07 Claire Xenia WolfFixing old e-mail addresses and deadnames
2021-05-22 Marcelina Kościelnickakernel/rtlil: Extract some helpers for checking memory...
2021-03-25 Zachary Snowrtlil: add const accessors for modules, wires, and...
2021-03-17 gatecatblackbox: Include whiteboxed modules
2021-03-15 Marcelina Kościelnickartlil: Disallow 0-width chunks in SigSpec.
2021-03-11 whitequarkMerge pull request #2642 from whitequark/cxxrtl-noproc...
2021-03-09 whitequarkMerge pull request #2643 from zachjs/fix-param-no-defau...
2021-03-08 Marcelina KościelnickaAdd support for memory writes in processes.
2021-03-07 whitequarkMerge pull request #2626 from zachjs/param-no-default
2021-03-07 whitequarkMerge pull request #2632 from zachjs/width-limit
2021-03-05 Dan RavensloftReplace assert in addModule with more useful error...
2021-02-12 gatecatMerge pull request #2585 from YosysHQ/dave/nexus-dotproduct
2021-02-03 whitequarkMerge pull request #2436 from dalance/fix_generate
2021-01-01 whitequarkMerge pull request #2480 from YosysHQ/dave/nexus-lram
2020-12-23 whitequarkMerge pull request #2476 from zachjs/const-arg-width
2020-12-22 whitequarkMerge pull request #2479 from zachjs/const-arg-hint
2020-12-08 whitequarkMerge pull request #2478 from whitequark/improve-bugpoint
2020-12-07 whitequarkbugpoint: add -wires option.
2020-11-25 Claire XenMerge pull request #2133 from dh73/nodev_head
2020-11-24 Miodrag MilanovićMerge pull request #2295 from epfl-vlsc/firrtl_blackbox...
2020-09-17 clairexenMerge pull request #2329 from antmicro/arrays-fix-multi...
2020-09-17 clairexenMerge pull request #2330 from antmicro/arrays-fix-multi...
2020-09-01 clairexenMerge pull request #2352 from zachjs/const-func-localparam
2020-09-01 clairexenMerge pull request #2366 from zachjs/library-format
2020-09-01 clairexenMerge pull request #2353 from zachjs/top-scope
2020-09-01 clairexenMerge pull request #2365 from zachjs/const-arg-loop...
2020-08-27 whitequarkMerge pull request #2357 from whitequark/cxxflags-MP
2020-08-27 whitequarkMerge pull request #2356 from whitequark/flatten-techma...
2020-08-27 whitequarkMerge pull request #2358 from whitequark/rename-ilang...
2020-08-26 whitequarkReplace "ILANG" with "RTLIL" everywhere.
2020-08-20 clairexenMerge pull request #2344 from YosysHQ/mwk/opt_share...
2020-08-20 clairexenMerge pull request #2337 from YosysHQ/mwk/clean-keep...
2020-08-20 clairexenMerge pull request #2333 from YosysHQ/mwk/peepopt-shift...
2020-08-20 clairexenMerge pull request #2328 from YosysHQ/mwk/opt_dff-cleanup
2020-08-20 clairexenMerge pull request #2327 from YosysHQ/mwk/techmap-const...
2020-08-20 clairexenMerge pull request #2326 from YosysHQ/mwk/peeopt-muldiv...
2020-08-20 clairexenMerge pull request #2319 from YosysHQ/mwk/techmap-cellt...
2020-08-19 clairexenMerge pull request #2122 from PeterCrozier/struct_array2
2020-08-18 XiretzaEnsure \A_SIGNED is never used with $shiftx
2020-07-02 clairexenMerge pull request #2132 from YosysHQ/eddie/verific_initial
2020-07-01 clairexenMerge pull request #2179 from splhack/static-cast
2020-06-25 clairexenMerge pull request #2168 from whitequark/assert-unused...
2020-06-25 clairexenMerge pull request #2135 from boqwxp/qbfsat-timeinfo
2020-06-25 clairexenMerge pull request #2093 from boqwxp/qbfsat-bugfixes
2020-06-23 clairexenMerge pull request #1818 from YosysHQ/mwk/new-ff-types
2020-06-23 Marcelina KościelnickaAdd add* functions for the new FF types
2020-06-23 Marcelina KościelnickaAdd new builtin FF types
2020-06-09 clairexenMerge pull request #2112 from YosysHQ/claire/fix2040
2020-06-09 whitequarkMerge pull request #2128 from whitequark/flatten-processes
2020-06-09 whitequarkRTLIL: add Module::addProcess, use it in Module::cloneI...
2020-06-09 whitequarkMerge pull request #2107 from whitequark/flatten-hdlname
2020-06-08 whitequarkflatten: preserve original object names via hdlname...
2020-06-08 whitequarkRTLIL: use {get,set}_string_attribute in {get,set}_strp...
2020-06-08 whitequarkMerge pull request #2121 from whitequark/cxxrtl-debug...
2020-06-08 clairexenMerge pull request #2085 from rswarbrick/select
2020-06-08 clairexenMerge pull request #2089 from rswarbrick/modports
2020-06-08 clairexenMerge pull request #2105 from whitequark/split-flatten...
2020-06-05 whitequarkMerge pull request #2113 from whitequark/cxxrtl-fix...
2020-06-04 clairexenMerge pull request #2041 from PeterCrozier/struct
2020-06-04 clairexenMerge pull request #2099 from Xiretza/manual-include...
2020-06-04 Eddie HungMerge pull request #2077 from YosysHQ/eddie/abc9_dff_im...
2020-06-04 whitequarkMerge pull request #2006 from jersey99/signed-in-rtlil...
2020-06-04 N. EngelhardtMerge pull request #2070 from hackfin/master
2020-06-04 Eddie HungMerge pull request #2082 from YosysHQ/eddie/abc9_scc_fixes no_loop
2020-06-04 whitequarkRTLIL: factor out RTLIL::Module::addMemory. NFC.
2020-06-03 Peter CrozierMerge branch 'master' into struct
2020-06-03 Eddie HungMerge pull request #2080 from YosysHQ/eddie/fix_test_wa...
2020-05-31 clairexenMerge pull request #1862 from boqwxp/cleanup_techmap
2020-05-30 Eddie HungMerge pull request #2081 from YosysHQ/eddie/blackbox_ast
2020-05-30 clairexenMerge pull request #2018 from boqwxp/qbfsat-timeout
2020-05-29 clairexenMerge pull request #2029 from whitequark/fix-simplify...
2020-05-29 clairexenMerge pull request #1885 from Xiretza/mod-rem-cells
2020-05-28 XiretzaAdd flooring division operator
2020-05-28 XiretzaAdd flooring modulo operator
2020-05-14 Eddie HungRevert "Merge branch 'eddie/kernel_makeblackbox' into...
2020-05-14 Eddie Hungkernel: Module::makeblackbox() to clear connections...
2020-05-03 whitequarkMerge pull request #2000 from whitequark/log_error...
2020-05-01 Claire WolfMerge pull request #1981 from YosysHQ/claire/fix1837
2020-04-27 Vamsi K VytlaPreserve 'signed'-ness of a verilog wire through RTLIL
2020-04-24 whitequarkMerge pull request #1998 from whitequark/cxxrtl-fixes
2020-04-23 Eddie HungMerge pull request #1974 from YosysHQ/eddie/abc9_disabl...
2020-04-23 Claire WolfMerge pull request #1989 from boqwxp/qbfsat_anyconst_so...
2020-04-23 Claire WolfMerge pull request #1988 from boqwxp/qbfsat
2020-04-23 Claire WolfMerge pull request #1986 from YosysHQ/eddie/verific_enum
2020-04-23 Eddie HungMerge pull request #1984 from YosysHQ/eddie/getParam_ex...
2020-04-22 Eddie Hungkernel: Cell::getParam() to throw exception again if...
2020-04-22 Eddie HungMerge pull request #1949 from YosysHQ/eddie/select_blackbox
2020-04-22 Eddie HungMerge pull request #1969 from boqwxp/pool_emplace
2020-04-22 Eddie HungMerge pull request #1973 from YosysHQ/eddie/fix1966
2020-04-22 Eddie HungMerge pull request #1950 from YosysHQ/eddie/design_import
2020-04-22 Claire WolfMerge pull request #1976 from YosysHQ/dave/fix-sim...
2020-04-22 Claire WolfMerge pull request #1979 from whitequark/cxxrtl-go...
2020-04-21 Marcelina KościelnickaUse default parameter value in getParam
2020-04-21 Marcelina Kościelnickailang, ast: Store parameter order and default value...
2020-04-21 Claire WolfMerge pull request #1851 from YosysHQ/claire/bitselwrite
2020-04-17 whitequarkMerge pull request #1952 from boqwxp/add_edge_location
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