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[yosys.git]
/
kernel
/
sigtools.h
2019-09-18
Eddie Hung
Merge pull request #1355 from YosysHQ/eddie/peepopt_dff...
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2019-09-18
Eddie Hung
Merge remote-tracking branch 'origin/master' into xc7dsp
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2019-09-18
Eddie Hung
Merge pull request #1379 from mmicko/sim_models
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2019-09-15
Eddie Hung
Merge pull request #1374 from YosysHQ/eddie/fix1371
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2019-09-13
Eddie Hung
Spacing
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2019-09-13
Eddie Hung
Use template specialisation
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2019-09-12
Eddie Hung
Grammar
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2019-09-12
Eddie Hung
static_assert to enforce this going forward
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2016-07-08
Clifford Wolf
Merge branch 'yosys-0.5-vtr' of https://github.com...
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2016-02-01
Clifford Wolf
SigMap performance improvement
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2015-12-07
Clifford Wolf
Merge pull request #108 from cseed/master
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2015-11-30
Clifford Wolf
Re-added SigMap::allbits()
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2015-10-28
Clifford Wolf
Improved SigMap performance
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2015-10-27
Clifford Wolf
Improvements in new SigMap
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2015-10-27
Clifford Wolf
Removed old SigMap implementation
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2015-10-27
Clifford Wolf
Added hashlib::mfp and new SigMap
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2015-08-31
Clifford Wolf
Added SigMap::allbits()
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2015-07-02
Clifford Wolf
Fixed trailing whitespaces
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2015-04-03
Ahmed Irfan
Merge branch 'master' of https://github.com/cliffordwol...
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2015-01-31
Clifford Wolf
Added "equiv_induct -undef"
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2014-12-29
Clifford Wolf
dict/pool changes in opt_clean
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2014-12-26
Clifford Wolf
Using Yosys::dict and Yosys::pool in sigtools.h
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2014-10-10
Clifford Wolf
Renamed SIZE() to GetSize() because of name collision...
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2014-09-22
Ahmed Irfan
Merge branch 'master' of https://github.com/cliffordwol...
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2014-08-01
Clifford Wolf
Added ModIndex helper class, some changes to RTLIL...
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2014-07-31
Clifford Wolf
Moved some stuff to kernel/yosys.{h,cc}, using Yosys...
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2014-07-28
Clifford Wolf
Using log_assert() instead of assert()
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2014-07-27
Clifford Wolf
Added SigPool::check(bit)
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2014-07-26
Clifford Wolf
Merge automatic and manual code changes for new cell...
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2014-07-26
Clifford Wolf
Changed users of cell->connections_ to the new API...
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2014-07-26
Clifford Wolf
Renamed RTLIL::{Module,Cell}::connections to connections_
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2014-07-23
Clifford Wolf
Removed RTLIL::SigSpec::expand() method
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2014-07-23
Clifford Wolf
Merge branch: Refactoring {SigSpec|SigChunk}(RTLIL...
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2014-07-23
Clifford Wolf
Refactoring {SigSpec|SigChunk}(RTLIL::Wire *wire, ...
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2014-07-23
Clifford Wolf
Refactoring {SigSpec|SigChunk}(RTLIL::Wire *wire, ...
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2014-07-22
Clifford Wolf
SigSpec refactoring: More cleanups of old SigSpec use...
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2014-07-22
Clifford Wolf
SigSpec refactoring: change RTLIL::SigSpec::chunks...
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2014-07-22
Clifford Wolf
SigSpec refactoring: using the accessor functions every...
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2014-07-22
Clifford Wolf
SigSpec refactoring: renamed chunks and width to __chun...
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2014-07-19
Clifford Wolf
Some "const" cleanups in SigMap
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2013-08-09
Clifford Wolf
Some fixes to improve determinism
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2013-08-06
Clifford Wolf
Fixed SigPool::del() method
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2013-06-08
Clifford Wolf
Improved auto-detection of -show signals in sat_solve
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2013-03-15
Clifford Wolf
Added additional functionality and cleanups in sigtools...
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2013-02-27
Clifford Wolf
Implemented basic functionality of "extract" pass
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2013-01-05
Clifford Wolf
initial import
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