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fpga: Arty A7's don't need multiple filesets
[microwatt.git]
/
microwatt.core
2019-09-30
Benjamin Herrenschmidt
fpga: Arty A7's don't need multiple filesets
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2019-09-28
Anton Blanchard
Merge pull request #75 from paulusmack/master
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2019-09-27
Paul Mackerras
fpga: Add definitions for Arty A7-100 board
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2019-09-24
Anton Blanchard
Merge branch 'divider' of https://github.com/paulusmack...
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2019-09-24
Anton Blanchard
Merge pull request #69 from antonblanchard/debug-module
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2019-09-23
Anton Blanchard
Add core_debug.vhdl to fusesoc configs
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2019-09-23
Paul Mackerras
Add a divider unit and a testbench for it
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2019-09-20
Benjamin Herrenschmidt
Wishbone debug module
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2019-09-20
Benjamin Herrenschmidt
Add a debug (DMI) bus and a JTAG interface to it on...
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2019-09-12
Anton Blanchard
Merge pull request #49 from antonblanchard/icache-2
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2019-09-12
Anton Blanchard
Add a simple direct mapped icache
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2019-09-10
Benjamin Herrenschmidt
Share soc.vhdl between FPGA and sim
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2019-09-10
Benjamin Herrenschmidt
Pass wishbone record to bram memory module
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2019-09-10
Benjamin Herrenschmidt
Split FPGA toplevel from soc
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2019-09-08
Anton Blanchard
Merge pull request #19 from antonblanchard/cmod-a7
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2019-09-08
Anton Blanchard
Cmod A7-35 support
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2019-09-08
Anton Blanchard
Merge pull request #20 from antonblanchard/reset-rework2
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2019-09-07
Anton Blanchard
Rework SOC reset
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2019-09-03
Anton Blanchard
Merge pull request #16 from antonblanchard/decode2_rework2
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2019-09-03
Anton Blanchard
Rework decode2
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2019-08-29
Anton Blanchard
Merge pull request #10 from antonblanchard/arty-fix
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2019-08-29
Anton Blanchard
Arty A7 reset pin is C2
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2019-08-29
Anton Blanchard
Merge pull request #7 from riktw/fusesoc_arty_a7
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2019-08-29
riktw
Added support for building for Arty A7 boards
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2019-08-26
Anton Blanchard
Merge pull request #3 from olofk/plle2
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2019-08-26
Olof Kindgren
Add and use plle2 primitive for nexys boards
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2019-08-23
Anton Blanchard
Merge pull request #2 from olofk/fusesoc_nexys_a7
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2019-08-23
Olof Kindgren
Added synthesis target
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2019-08-23
Olof Kindgren
Add Nexys Video support
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2019-08-23
Olof Kindgren
Add FuseSoC core description file with Nexys A7 support
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