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hdl.ir: flatten hierarchy based on memory accesses, too.
[nmigen.git] / nmigen / hdl / ir.py
2018-12-22 whitequarkhdl.ir: flatten hierarchy based on memory accesses... blob | commitdiff | raw
2018-12-22 whitequarkhdl.ir: factor out _merge_subfragment. NFC. blob | commitdiff | raw | diff to current
2018-12-22 whitequarkhdl.ir: fix port propagation between siblings, in the... blob | commitdiff | raw | diff to current
2018-12-21 whitequarkhdl.ir: fix port propagation between siblings. blob | commitdiff | raw | diff to current
2018-12-21 whitequarkhdl.ir: do not flatten instances or collect ports from... blob | commitdiff | raw | diff to current
2018-12-21 whitequarkhdl.ir: correctly handle named output and inout ports. blob | commitdiff | raw | diff to current
2018-12-20 whitequarkir: allow non-Signals in Instance ports. blob | commitdiff | raw | diff to current
2018-12-17 whitequarkfhdl.ir: add black-box fragments, fragment parameters... blob | commitdiff | raw | diff to current
2018-12-17 whitequarkhdl, back: add and use SignalSet/SignalDict. blob | commitdiff | raw | diff to current
2018-12-16 whitequarkhdl.dsl: add clock domain support. blob | commitdiff | raw | diff to current
2018-12-15 whitequarkRename fhdl→hdl, genlib→lib. blob | commitdiff | raw | diff to current