sim._pyrtl: fix miscompilation of -(Const(0b11, 2).as_signed()).
[nmigen.git] / nmigen / hdl /
2020-07-30 Adam Greighdl.mem: cast reset value for transparent read ports...
2020-07-07 awyglehdl.ast: don't inherit Shape from NamedTuple.
2020-06-30 whitequarkAdd (heavily work in progress) documentation.
2020-06-06 Adam Greighdl.xfrm: preserve allow_reset_less when transforming...
2020-06-05 Shawn Anastasiohdl.rec: preserve shapes when constructing a layout.
2020-05-24 Robin Ole Heinemannhdl.ast: fix typo
2020-05-20 whitequarkhdl.ast: add const-shift operations.
2020-05-19 whitequarkhdl.ast: clarify docs for Value.rotate_{left,right}.
2020-05-19 whitequarkhdl.dsl: check for unique domain name.
2020-04-27 whitequarkhdl.ast: use SignalSet, not ValueSet, for _[lr]hs_signa...
2020-04-24 awyglehdl.ir: typecheck `convert(ports=)` more carefully.
2020-04-16 anuejnhdl.rec: make Record inherit from UserValue. working_23jun2020
2020-04-15 whitequarkback.rtlil: translate enum decoders to Yosys enum attri...
2020-04-13 Dan Ravenslofthdl.ast: add Value.{rotate_left,rotate_right}.
2020-04-12 whitequarkhdl.rec: improve repr() for Layout.
2020-04-12 whitequarkhdl.ast: improve repr() for Shape.
2020-04-05 whitequarkhdl.mem: fix source location of ReadPort.en.
2020-03-22 whitequarkhdl.ast: implement abs() on values.
2020-03-14 awygleCorrectly handle resets in AsyncFIFO.
2020-03-08 awyglelib.cdc: extract AsyncFFSynchronizer.
2020-02-19 whitequarkhdl.ast: fix off-by-1 in Initial.__init__().
2020-02-06 whitequarkhdl.ast: add Value.{as_signed,as_unsigned}.
2020-02-06 whitequarkhdl.dsl: make referencing undefined FSM states an error.
2020-02-06 whitequarkhdl.ir: type check ports.
2020-02-06 whitequarkhdl.dsl: reject name mismatch in `m.domains.<name>...
2020-02-06 whitequarkhdl.dsl: type check when adding to m.domains.
2020-02-06 whitequarkhdl.mem: add synthesis attribute support.
2020-02-06 whitequarkhdl.mem: document Memory.
2020-02-04 whitequarkhdl.{ast,dsl}: allow whitespace in bit patterns.
2020-02-01 whitequarkhdl.ast: update documentation for Signal.
2020-02-01 whitequarkhdl.ast: prohibit shifts by signed value.
2020-02-01 whitequarkbuild.plat: align pipeline with Fragment.prepare().
2020-02-01 whitequarkhdl.dsl: don't allow inheriting from Module.
2020-02-01 whitequarkhdl.ast: warn on unused property statements (Assert...
2020-02-01 whitequark_unused: extract must-use logic from hdl.ir.
2020-01-31 whitequarkhdl.dsl: add missing case width check for Enum values.
2020-01-31 whitequarkhdl.dsl: make `if m.{If,Elif,Else}(...)` a syntax error.
2020-01-18 whitequarkhdl.ir: resolve hierarchy conflicts before creating...
2020-01-17 whitequarkhdl.xfrm: transform drivers as well in DomainRenamer.
2020-01-12 whitequarkRemove everything deprecated in nmigen 0.1.
2020-01-11 Staf VerhaegenSignal: allow to use integral Enum for reset value.
2019-12-15 whitequarkhdl.mem: fix src_loc_at in ReadPort, WritePort.
2019-12-04 Marcin Kościelnickihdl.ast: Fix width for unary minus operator on signed...
2019-12-02 whitequarkhdl.ast: actually remove simulator commands.
2019-11-26 whitequarkhdl.ir: for instance ports, prioritize defs over uses.
2019-11-09 whitequarkhdl.rec: fix Record.like() being called through a subclass. v0.1
2019-11-09 Staf Verhaegenhdl.rec: make Record(name=) keyword-only.
2019-11-07 whitequarkhdl.ir: lower domains before resolving hierarchy conflicts.
2019-10-26 whitequarktest: use `#nmigen:` magic comment instead of monkey...
2019-10-26 whitequarkhdl.ir: allow disabling UnusedElaboratable warning...
2019-10-26 whitequarkhdl.ast: simplify {bit,word}_select with constant offset.
2019-10-21 whitequarkExplicitly restrict prelude imports.
2019-10-13 whitequark{,_}tools→{,_}utils
2019-10-13 whitequarkhdl.ir: allow ClockSignal and ResetSignal in ports.
2019-10-13 whitequarkhdl.ir: cast instance port connections to Values.
2019-10-12 whitequarkhdl.ast: rename Slice.end back to Slice.stop.
2019-10-12 whitequark_tools: extract most utility methods to a private package.
2019-10-11 whitequarkRename remaining `wrap` methods to `cast`.
2019-10-11 whitequarkhdl.ast: deprecate shapes like `(1, True)` in favor...
2019-10-11 whitequarkhdl.ast: deprecate Signal.{range,enum}.
2019-10-11 whitequarkhdl.ast: add an explicit Shape class, included in prelude.
2019-10-11 whitequarkConsistently use {!r}, not '{!r}' in diagnostics.
2019-10-11 whitequarkhdl.ast: Operator.{op→operator}
2019-10-11 whitequarkhdl.ast: simplify enum handling.
2019-10-11 whitequarkhdl.ast: Value.{wrap→cast}
2019-10-09 whitequarkbuild.plat: elaborate result of create_missing_domain...
2019-10-04 whitequarkhdl.ast: prohibit signed divisors.
2019-10-02 whitequarkhdl.ast: don't crash on Mux(<bool>, ...).
2019-09-28 whitequarkhdl.ast: actually implement the // operator.
2019-09-28 whitequarkhdl.dsl: add a diagnostic for `m.d.submodules += ...`.
2019-09-28 whitequarkhdl.mem: remove WritePort(priority=) argument.
2019-09-23 whitequarkhdl.ast: cast Mux() selector to bool if it is not a...
2019-09-23 whitequarkhdl.mem,lib.fifo: use keyword-only arguments for memory...
2019-09-23 whitequarkhdl.mem: simplify. NFC.
2019-09-23 whitequarkhdl.ast: make Signal(name=) a keyword-only argument.
2019-09-22 whitequarkhdl.rec: fix using Enum subclass as shape if direction...
2019-09-22 whitequarkhdl.rec: allow using Enum subclass as shape.
2019-09-21 whitequarkhdl.ast: update docs. NFC.
2019-09-20 whitequarkhdl.mem: use 1 as reset value for ReadPort.en.
2019-09-20 whitequarkhdl.ast: rename `nbits` to `width`.
2019-09-16 whitequarkhdl.{ast,dsl}: add Signal.enum; coerce Enum to Value...
2019-09-14 whitequarkhdl.ast: add Value.matches(), accepting same language...
2019-09-14 whitequarkhdl.dsl: improve error messages for Case().
2019-09-13 whitequarkhdl.ast: add Value.xor, mapping to $reduce_xor.
2019-09-13 whitequarkhdl.ast: add Value.{any,all}, mapping to $reduce_{or...
2019-09-12 whitequarkhdl.mem: use keyword-only arguments as appropriate.
2019-09-10 whitequarkhdl.ast: warn if reset value is truncated.
2019-09-08 whitequarkhdl.ast: check type of Sample(domain=...).
2019-09-08 whitequarkhdl.dsl: add Default(), an alias for Case() with no...
2019-09-08 whitequarkhdl.mem,lib,examples: use Signal.range().
2019-09-08 whitequarkhdl.ast: add Signal.range(...), to replace Signal(min...
2019-09-03 whitequarkhdl.ast,back.rtlil: implement Cover.
2019-08-31 whitequarkhdl.cd: add negedge clock domains.
2019-08-19 whitequarkbuild.plat, hdl.ir: coordinate missing domain creation.
2019-08-19 whitequarkhdl.cd: implement local clock domains.
2019-08-19 whitequarkhdl.xfrm: lower resets in DomainLowerer as well.
2019-08-19 whitequarkhdl.xfrm: consider fragment's own domains in DomainLowerer.
2019-08-19 whitequarkformal→asserts
2019-08-18 whitequarkhdl.xfrm: make deprecated CEInserter more well-behaved.
2019-08-15 whitequarkhdl.ast: implement Initial.
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