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back.pysim: correctly add gtkwave traces for signals with decoders.
[nmigen.git] / nmigen / hdl /
2019-07-10 whitequarkhdl.ir: make UnusedElaboratable a real warning. tree | commitdiff
2019-07-09 whitequarkhdl.{ast,dsl},back.rtlil: track source locations for... tree | commitdiff
2019-07-08 whitequarkhdl.rec: respect modifications to signals in Record... tree | commitdiff
2019-07-08 whitequarkhdl.{ast,cd,dsl,xfrm}: reject inappropriately used... tree | commitdiff
2019-07-08 whitequarkhdl.xfrm: don't overwrite source locations on ClockDoma... tree | commitdiff
2019-07-08 whitequarkhdl.{dsl,mem,xfrm}: inject appropriate source locations. tree | commitdiff
2019-07-08 whitequarkhdl.ast: use keyword-only arguments as appropriate. tree | commitdiff
2019-07-07 whitequarkhdl.dsl: further clarify error message for incorrect... tree | commitdiff
2019-07-07 whitequarkhdl.dsl: clarify error message for incorrect nesting. tree | commitdiff
2019-07-07 whitequarkhdl.dsl: gracefully handle FSM with no states. tree | commitdiff
2019-07-03 whitequarkhdl.dsl: fix src_loc_at for FSM state signal. tree | commitdiff
2019-07-03 whitequarkback.rtlil: emit \src attributes for processes via... tree | commitdiff
2019-07-03 whitequarkhdl.ast: fix src_loc_at for Mux(). tree | commitdiff
2019-07-03 whitequarkhdl.rec: thread src_loc_at to all inner Signals and... tree | commitdiff
2019-07-03 whitequarkhdl.rec: accept Record(src_loc_at=...). tree | commitdiff
2019-07-02 whitequarkhdl.ast: recognize a Enum used as decoder and format... tree | commitdiff
2019-07-02 whitequarkhdl.mem: fix naming of registers inside unnamed memories. tree | commitdiff
2019-07-02 whitequarkhdl.rec: implement slicing by component names. tree | commitdiff
2019-07-02 whitequarkhdl.rec: implement Record.like. tree | commitdiff
2019-07-01 whitequarkhdl.mem: use read_port(domain="comb") for asynchronous... tree | commitdiff
2019-06-28 whitequarkhdl.{ast,dsl}, back.{pysim,rtlil}: allow multiple case... tree | commitdiff
2019-06-28 whitequarkhdl.ir, back.rtlil: allow specifying attributes on... tree | commitdiff
2019-06-25 whitequarkhdl.{ast,dst}: directly represent RTLIL default case. tree | commitdiff
2019-06-13 whitequarkhdl.ast: tighten assertion in Switch(). tree | commitdiff
2019-06-12 whitequarkhdl.ast: add name_suffix=".." option to Signal.like(). tree | commitdiff
2019-06-11 whitequarkhdl.ast: implement values with custom lowering. tree | commitdiff
2019-06-11 whitequarkhdl.mem: coerce memory init values to integers. tree | commitdiff
2019-06-04 whitequarkhdl.ir: rephrase elaboratable warning to not look like... tree | commitdiff
2019-06-04 whitequarkhdl.xfrm: handle empty lhs in LHSGroup{Analyzer,Filter}. tree | commitdiff
2019-06-04 whitequarkClean up imports. tree | commitdiff
2019-06-03 whitequarkhdl.rec: unbreak hasattr(rec, ...). tree | commitdiff
2019-06-03 whitequarkhdl.ir: accept LHS signals like slices as Instance... tree | commitdiff
2019-06-03 whitequarkhdl.dsl: allow adding submodules with computed name... tree | commitdiff
2019-06-03 whitequarkhdl.ir: accept expanded (kind, name, value) tuples... tree | commitdiff
2019-05-26 whitequarkhdl.ir: silence unused elaboratable warning on interpre... tree | commitdiff
2019-05-25 whitequarkhdl.rec: allow providing fields during construction. tree | commitdiff
2019-05-25 whitequarkConsider Instances a part of containing fragment for... tree | commitdiff
2019-05-15 whitequarkhdl.ir: when adding sync domain to a design, also add... tree | commitdiff
2019-05-13 whitequarkhdl.ir: during port propagation, defs should take prior... tree | commitdiff
2019-05-12 whitequarkhdl: make all public Value classes other than Record... tree | commitdiff
2019-05-12 whitequarkhdl.ir: only pull explicitly specified ports to topleve... tree | commitdiff
2019-04-22 whitequarkhdl.ir: rework named port handling for Instances. tree | commitdiff
2019-04-21 whitequarkhdl.ir: detect elaboratables that are created but not... tree | commitdiff
2019-04-21 whitequarkhdl.ast: accept Signals with identical min/max bounds. tree | commitdiff
2019-04-21 whitequarkhdl.rec: implement Record.connect. tree | commitdiff
2019-04-19 whitequarkhdl.rec: fix slicing of records. tree | commitdiff
2019-04-18 whitequarkhdl.xfrm: handle classes that inherit from Record. tree | commitdiff
2019-04-10 whitequarkhdl.ast: fix some type checks. tree | commitdiff
2019-04-10 whitequarkhdl.xfrm: allow using FragmentTransformer on any elabor... tree | commitdiff
2019-04-09 whitequarkhdl: remove deprecated get_fragment() and lower() methods. tree | commitdiff
2019-04-03 whitequarkhdl.ast: handle a common typo, such as Signal(1, True). tree | commitdiff
2019-03-25 anuejnhdl.rec: separate record and signal name with __, not _. tree | commitdiff
2019-03-25 whitequarkhdl.ast: fix typo. tree | commitdiff
2019-03-03 whitequarktracer: factor out get_var_name(default=). tree | commitdiff
2019-03-03 whitequarkhdl.rec: remove __slots__. tree | commitdiff
2019-02-14 whitequarkhdl.ir: raise a more descriptive error on non-elaborata... tree | commitdiff
2019-01-26 whitequarkhdl.ast: fix ValueKey for Cat. tree | commitdiff
2019-01-26 whitequarkhdl.ir: rename .get_fragment() to .elaborate(). tree | commitdiff
2019-01-26 whitequarkhdl.ast: fix shape calculation for *. tree | commitdiff
2019-01-19 whitequarkhdl.ast: implement shape for modulo operator. tree | commitdiff
2019-01-19 whitequarkhdl.ast: add Value.implies. tree | commitdiff
2019-01-19 whitequarkhdl.xfrm: mark internal registers used in lowering... tree | commitdiff
2019-01-19 whitequarkhdl.ast: give Assert and Assume their own src_loc. tree | commitdiff
2019-01-18 whitequarkback.rtlil: only emit each AnyConst/AnySeq cell once. tree | commitdiff
2019-01-17 whitequarkhdl.ast: allow sampling ClockSignal, ResetSignal. tree | commitdiff
2019-01-17 whitequarkhdl.ast: add Past, Stable, Rose, Fell. tree | commitdiff
2019-01-17 whitequarkhdl.xfrm: add SampleLowerer. tree | commitdiff
2019-01-17 whitequarkhdl.ast: add Sample. tree | commitdiff
2019-01-16 whitequarkhdl.ast: fix naming of Signal.like() signals when trace... tree | commitdiff
2019-01-15 William D. Joneshdl.xfrm: Add on_AnyConst and on_AnySeq abstract method... tree | commitdiff
2019-01-15 William D. Joneshdl.ast: Add AnyConst and AnySeq value types. tree | commitdiff
2019-01-14 whitequarkhdl.ir: allow explicitly requesting flattening. tree | commitdiff
2019-01-14 whitequarkhdl: make ClockSignal and ResetSignal usable on LHS. tree | commitdiff
2019-01-13 whitequarkhdl.dsl: cases wider than switch test value are unreach... tree | commitdiff
2019-01-13 whitequarkhdl.dsl: accept (but warn on) cases wider than switch... tree | commitdiff
2019-01-02 whitequarkhdl.ast: allow slicing [n:n] into n-bit value. tree | commitdiff
2019-01-02 William D. Joneshdl.xfrm: Add Assert and Assume abstract methods for... tree | commitdiff
2019-01-02 William D. Joneshdl.dsl: Support Assert and Assume where an Assign... tree | commitdiff
2019-01-02 William D. Joneshdl.ast: Add Assert and Assign statements. tree | commitdiff
2019-01-01 whitequarkhdl.ast: experimentally add Value._as_const. tree | commitdiff
2019-01-01 whitequarkhdl.rec: include record name in error message. tree | commitdiff
2019-01-01 whitequarkhdl.rec: use a helpful error on unknown field reference. tree | commitdiff
2019-01-01 whitequarkhdl.mem: add DummyPort, for testing and verification. tree | commitdiff
2018-12-29 whitequarklib.cdc: fix tests to actually run. tree | commitdiff
2018-12-28 whitequarkhdl.rec: add basic record support. tree | commitdiff
2018-12-28 whitequarktracer: factor out get_src_loc(). tree | commitdiff
2018-12-27 whitequarkhdl.dsl: add support for fsm.ongoing(). tree | commitdiff
2018-12-27 whitequarkhdl.mem: add missing __all__. tree | commitdiff
2018-12-26 whitequarkhdl.dsl: forbid m.next= inside of FSM but outside of... tree | commitdiff
2018-12-26 whitequarkhdl.dsl: provide generated values for FSMs. tree | commitdiff
2018-12-26 whitequarkhdl.ir: add an API for retrieving generated values... tree | commitdiff
2018-12-26 whitequarkexamples: add an FSM usage example (UART receiver). tree | commitdiff
2018-12-26 whitequarkhdl.dsl: add signal decoder to FSM state signal. tree | commitdiff
2018-12-26 whitequarkhdl.dsl: implement FSM. tree | commitdiff
2018-12-24 whitequarkhdl.mem: allow omitting memory simulation logic. tree | commitdiff
2018-12-24 whitequarkhdl.xfrm, back.rtlil: implement and use LHSGroupFilter. tree | commitdiff
2018-12-24 whitequarkhdl.xfrm: implement SwitchCleaner, for pruning empty... tree | commitdiff
2018-12-22 whitequarkhdl.xfrm: avoid cycles in union-find graph in LHSGroupA... tree | commitdiff
2018-12-22 whitequarkhdl.ir: flatten hierarchy based on memory accesses... tree | commitdiff
2018-12-22 whitequarkhdl.ir: factor out _merge_subfragment. NFC. tree | commitdiff
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