| 2019-10-26 |
whitequark | test: use `#nmigen:` magic comment instead of monkey... |
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| 2019-10-13 |
whitequark | {,_}tools→{,_}utils |
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| 2019-10-11 |
whitequark | hdl.ast: deprecate Signal.{range,enum}. |
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| 2019-10-11 |
whitequark | Consistently use {!r}, not '{!r}' in diagnostics. |
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| 2019-09-28 |
whitequark | hdl.dsl: add a diagnostic for `m.d.submodules += ...`. |
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| 2019-09-16 |
whitequark | hdl.{ast,dsl}: add Signal.enum; coerce Enum to Value... |
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| 2019-09-14 |
whitequark | hdl.dsl: improve error messages for Case(). |
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| 2019-09-08 |
whitequark | hdl.dsl: add Default(), an alias for Case() with no... |
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| 2019-09-03 |
whitequark | hdl.ast,back.rtlil: implement Cover. |
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| 2019-08-03 |
whitequark | hdl.dsl: reword m.If(~True) warning to be more clear. |
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| 2019-08-03 |
whitequark | hdl.dsl: warn on suspicious statements like `m.If(... |
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| 2019-07-19 |
N. Engelhardt | hdl.dsl: add getters to m.submodules. |
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| 2019-07-08 |
whitequark | hdl.{ast,cd,dsl,xfrm}: reject inappropriately used... |
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| 2019-07-07 |
whitequark | hdl.dsl: further clarify error message for incorrect... |
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| 2019-07-07 |
whitequark | hdl.dsl: clarify error message for incorrect nesting. |
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| 2019-07-07 |
whitequark | hdl.dsl: gracefully handle FSM with no states. |
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| 2019-06-28 |
whitequark | hdl.{ast,dsl}, back.{pysim,rtlil}: allow multiple case... |
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| 2019-06-25 |
whitequark | hdl.{ast,dst}: directly represent RTLIL default case. |
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| 2019-06-03 |
whitequark | hdl.dsl: allow adding submodules with computed name... |
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| 2019-01-26 |
whitequark | hdl.ir: rename .get_fragment() to .elaborate(). |
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| 2019-01-17 |
whitequark | hdl.ast: add Past, Stable, Rose, Fell. |
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| 2019-01-14 |
whitequark | hdl: make ClockSignal and ResetSignal usable on LHS. |
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| 2019-01-13 |
whitequark | hdl.dsl: cases wider than switch test value are unreach... |
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| 2019-01-13 |
whitequark | hdl.dsl: accept (but warn on) cases wider than switch... |
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| 2019-01-02 |
William D. Jones | hdl.dsl: Support Assert and Assume where an Assign... |
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| 2018-12-27 |
whitequark | hdl.dsl: add support for fsm.ongoing(). |
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| 2018-12-26 |
whitequark | hdl.dsl: forbid m.next= inside of FSM but outside of... |
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| 2018-12-26 |
whitequark | hdl.dsl: provide generated values for FSMs. |
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| 2018-12-26 |
whitequark | hdl.dsl: implement FSM. |
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| 2018-12-17 |
whitequark | hdl, back: add and use SignalSet/SignalDict. |
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| 2018-12-16 |
whitequark | hdl.dsl: add clock domain support. |
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| 2018-12-15 |
whitequark | hdl: appropriately rename tests. NFC. |
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projects / nmigen.git / history