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back.pysim: squash one level of hierarchy.
[nmigen.git] / nmigen /
2018-12-14 whitequarkback.pysim: squash one level of hierarchy. tree | commitdiff
2018-12-14 whitequarkback.pysim: implement blocking assignment semantics... tree | commitdiff
2018-12-14 whitequarkback.pysim: undriven sync signals should return to... tree | commitdiff
2018-12-14 whitequarkback.pysim: in simulator sync processes, start by waiti... tree | commitdiff
2018-12-14 whitequarkback.pysim: make initial phase configurable. tree | commitdiff
2018-12-14 whitequarkcompat.sim: match clock period. tree | commitdiff
2018-12-14 whitequarkcompat: add run_simulation shim. tree | commitdiff
2018-12-14 whitequarkpysim.back: fix add_sync_process wrapper to handle... tree | commitdiff
2018-12-14 whitequarkcompat.fhdl.module: fix specials. tree | commitdiff
2018-12-14 whitequarkcompat: add fhdl.specials.TSTriple shim. tree | commitdiff
2018-12-14 whitequarkgenlib.io: import TSTriple from Migen. tree | commitdiff
2018-12-14 whitequarkfhdl.ast: fix Switch with constant test. tree | commitdiff
2018-12-14 whitequarkcompat: add genlib.cdc.MultiReg shim. tree | commitdiff
2018-12-14 whitequarkcompat.fhdl.module: update deprecation messages. tree | commitdiff
2018-12-14 whitequarkback.pysim: Simulator({gtkw_signals→traces}=). tree | commitdiff
2018-12-14 whitequarkback.pysim: better naming. NFC. tree | commitdiff
2018-12-14 whitequarkback.pysim: implement most operators and add tests. tree | commitdiff
2018-12-14 whitequarkback.pysim: close .vcd/.gtkw files on context manager... tree | commitdiff
2018-12-14 whitequarkback.pysim: show more legible names for processes in... tree | commitdiff
2018-12-14 whitequarkback.pysim: throw exceptions back at processes. tree | commitdiff
2018-12-14 whitequarkback.pysim: add gtkw traces even more robustly. tree | commitdiff
2018-12-14 whitequarkback.pysim: accept (and evaluate) generator functions. tree | commitdiff
2018-12-14 whitequarkback.pysim: skip VCD signal population if VCD is not... tree | commitdiff
2018-12-14 whitequarkback.pysim: allow processes to evaluate expressions. tree | commitdiff
2018-12-14 whitequarkfhdl.ir: oops, we defined DomainError twice. tree | commitdiff
2018-12-14 whitequarkback.pysim: more general clean-up. tree | commitdiff
2018-12-14 whitequarkback.pysim: general clean-up. tree | commitdiff
2018-12-14 whitequarkback.pysim: accept any valid assignments from processes. tree | commitdiff
2018-12-14 whitequarkback.pysim: robustly retrieve vcd names for clk/rst... tree | commitdiff
2018-12-14 whitequarkfhdl.xfrm: implement DomainLowerer. tree | commitdiff
2018-12-14 whitequarkback.pysim: undriven comb signals should return to... tree | commitdiff
2018-12-14 whitequarkast, back.pysim: allow specifying user-defined decoders... tree | commitdiff
2018-12-14 whitequarkback.pysim: fix completely broken codegen for Switch. tree | commitdiff
2018-12-14 whitequarkback.pysim: raise an exception if delta cycles blow... tree | commitdiff
2018-12-14 whitequarkback.pysim: if requested, write a gtkw file with a... tree | commitdiff
2018-12-14 whitequarkback.pysim: explain how delta cycles work. tree | commitdiff
2018-12-14 whitequarkback.pysim: delay clock processes by one half period. tree | commitdiff
2018-12-14 whitequarkback.pysim: implement "sync processes", like migen... tree | commitdiff
2018-12-14 whitequarkback.pysim: allow suspending processes until a tick... tree | commitdiff
2018-12-14 whitequarkback.pysim: use bare ints for signal values (-5% runtime). tree | commitdiff
2018-12-13 whitequarkback.pysim: collect handlers before running (-5% runtime). tree | commitdiff
2018-12-13 whitequarkback.pysim: allow multiple registered handlers per... tree | commitdiff
2018-12-13 whitequarkback.pysim: fix handling of process termination. tree | commitdiff
2018-12-13 whitequarkback.pysim: new simulator backend (WIP). tree | commitdiff
2018-12-13 whitequarkfhdl.cd: rename ClockDomain signals together with domain. tree | commitdiff
2018-12-13 whitequarkfhdl.ir: move Fragment prepare logic from back.rtlil. tree | commitdiff
2018-12-13 whitequarkback.verilog: remove debug code. tree | commitdiff
2018-12-13 whitequarkfhdl.ir: record port direction explicitly. tree | commitdiff
2018-12-13 whitequarkcompat.genlib.fsm: import/wrap Migen code. tree | commitdiff
2018-12-13 whitequarkfhdl.ir: a subfragment's input that we don't drive... tree | commitdiff
2018-12-13 whitequarkfhdl, back: trace and emit source locations of values. tree | commitdiff
2018-12-13 whitequarkback.rtlil: never give subfragment cells names starting... tree | commitdiff
2018-12-13 whitequarkfhdl.ir: don't crash propagataing ports in empty fragments. tree | commitdiff
2018-12-13 whitequarkfhdl.ir: implement clock domain propagation. tree | commitdiff
2018-12-13 whitequarkfhdl.ir: remove iter_domains(). tree | commitdiff
2018-12-13 whitequarkfhdl: cd_name→domain. tree | commitdiff
2018-12-13 whitequarkfhdl.cd: add tests. tree | commitdiff
2018-12-13 whitequarkfhdl.xfrm: implement DomainRenamer. tree | commitdiff
2018-12-13 whitequarkfhdl.xfrm: add test for ControlInserter with subfragments. tree | commitdiff
2018-12-13 whitequarkfhdl.xfrm: add tests for ResetInserter, CEInserter. tree | commitdiff
2018-12-13 whitequarkfhdl.ir: add tests for port propagation. tree | commitdiff
2018-12-13 whitequarkfhdl.dsl: add tests for lowering. 99% branch coverage. tree | commitdiff
2018-12-13 whitequarkfhdl.cd: rename ClockDomain.{reset→rst}. tree | commitdiff
2018-12-13 whitequarkfhdl.dsl: add tests for submodules. tree | commitdiff
2018-12-13 whitequarkfhdl.dsl: use less error-prone Switch/Case two-level... tree | commitdiff
2018-12-13 whitequarkfhdl.dsl: add tests for d.comb/d.sync, If/Elif/Else. tree | commitdiff
2018-12-13 whitequarkfhdl.ast: fix Switch._?hs_signals() for switch without... tree | commitdiff
2018-12-13 whitequarkback.verilog: detect undriven public wires using Yosys. tree | commitdiff
2018-12-13 whitequarkback.rtlil: fix swapped operands in sync assign. tree | commitdiff
2018-12-13 whitequarkback.rtlil: explain logic for CD reset insertion. tree | commitdiff
2018-12-13 whitequarkback.rtlil: explicitly set the top module. tree | commitdiff
2018-12-13 whitequarkfhdl.ir: explain how port enumeration works. tree | commitdiff
2018-12-13 whitequarkback.rtlil: explain how RTLIL conversion works. tree | commitdiff
2018-12-13 whitequarkfhdl.ir: make sure clocks and resets of used CDs appear... tree | commitdiff
2018-12-13 whitequarkback.rtlil: give clocks and resets nicer names. tree | commitdiff
2018-12-13 whitequarkcompat.fhdl.module: implement finalization. tree | commitdiff
2018-12-13 whitequarkback.rtlil: match shape of $mux ports A/B/Y. tree | commitdiff
2018-12-13 whitequarktracer: add support for Python 3.7. tree | commitdiff
2018-12-13 whitequarkfhdl.ast: bits_sign→shape. tree | commitdiff
2018-12-13 whitequarkfhdl.ast: add tests for most logic. tree | commitdiff
2018-12-12 whitequarkcompat.fhdl.{module,structure}: import/wrap Migen code... tree | commitdiff
2018-12-12 whitequarkcompat.fhdl.bitcontainer: import/wrap Migen code. tree | commitdiff
2018-12-12 whitequarkfhdl.ast.Signal: implement .like(). tree | commitdiff
2018-12-12 whitequarkfhdl.ir: fix port threading code. tree | commitdiff
2018-12-12 whitequarkfhdl.dsl: comb/sync/sync.pix→d.comb/d.sync/d.pix. tree | commitdiff
2018-12-12 whitequarkfhdl.ast.Signal: fix typo. tree | commitdiff
2018-12-12 whitequarkfhdl.ast.Signal: implement attrs field. tree | commitdiff
2018-12-12 whitequarkgenlib.cdc.MultiReg: self.regs should be a private... tree | commitdiff
2018-12-12 whitequarkfhdl.ast.Signal: implement width derivation from min... tree | commitdiff
2018-12-12 whitequarkgenlib.cdc.MultiReg: pull in from Migen. tree | commitdiff
2018-12-12 whitequarkfhdl.ast.Signal: implement reset_less signals. tree | commitdiff
2018-12-12 whitequarkfhdl.ast.Signal: assign an internal name if tracer... tree | commitdiff
2018-12-12 whitequarkfhdl.dsl: allow f.sync["dom"] as a synonym of f.sync... tree | commitdiff
2018-12-12 whitequarkClockDomain.{rst→reset}, for consistency with ResetInse... tree | commitdiff
2018-12-12 whitequarkInitial commit. tree | commitdiff