RX assembler: switch arguments of thw MVTACGU insn.
[binutils-gdb.git] / opcodes / aarch64-opc.c
2022-10-17 Richard Sandifordaarch64: Tweak handling of F_STRICT
2022-07-29 Andrew Burgesslibopcodes/aarch64: add support for disassembler styling
2022-06-29 Andrew Burgessopcodes/aarch64: split off creation of comment text...
2022-03-31 Richard Sandifordaarch64: Relax check for RNG system registers
2022-01-02 Alan ModraUpdate year range in copyright notice of binutils files
2021-12-03 Richard Sandifordaarch64: Fix uninitialised memory
2021-12-02 Richard Sandifordaarch64: Enforce P/M/E order for MOPS instructions
2021-12-02 Richard Sandifordaarch64: Add support for +mops
2021-12-02 Richard Sandifordaarch64: Add Armv8.8-A system registers
2021-12-02 Richard Sandifordaarch64: Add id_aa64isar2_el1
2021-12-02 Richard Sandifordaarch64: Tweak insn sequence code
2021-12-02 Richard Sandifordaarch64: Add maximum immediate value to aarch64_sys_reg
2021-11-30 Richard Sandifordaarch64: Add missing system registers [PR27145]
2021-11-30 Richard Sandifordaarch64: Make LOR registers conditional on +lor
2021-11-30 Richard Sandifordaarch64: Remove ZIDR_EL1
2021-11-30 Richard Sandifordaarch64: Allow writes to MFAR_EL3
2021-11-30 Richard Sandifordaarch64: Mark PMSIDR_EL1 as read-only
2021-11-30 Richard Sandifordaarch64: Remove duplicate system register entries
2021-11-25 Nick CliftonFix building the AArch64 assembler and disassembler...
2021-11-17 Przemyslaw Wirkusaarch64: [SME] SVE2 instructions added to support SME
2021-11-17 Przemyslaw Wirkusaarch64: [SME] Add new SME system registers
2021-11-17 Przemyslaw Wirkusaarch64: [SME] Add SME mode selection and state access...
2021-11-17 Przemyslaw Wirkusaarch64: [SME] Add LD1x, ST1x, LDR and STR instructions
2021-11-17 Przemyslaw Wirkusaarch64: [SME] Add ZERO instruction
2021-11-17 Przemyslaw Wirkusaarch64: [SME] Add MOV and MOVA instructions
2021-11-17 Przemyslaw Wirkusaarch64: [SME] Add SME instructions
2021-04-19 Przemyslaw Wirkusaarch64: New instructions for maintenance of GPT entrie...
2021-04-19 Przemyslaw Wirkusaarch64: Add new data cache maintenance operations
2021-04-16 Przemyslaw Wirkusaarch64: Define RME system registers
2021-03-31 Alan ModraUse bool in opcodes
2021-03-31 Alan ModraRemove bfd_stdint.h
2021-03-29 Alan ModraTRUE/FALSE simplification
2021-03-12 Przemyslaw Wirkusaarch64: Add few missing system registers
2021-01-11 Kyrylo Tkachovaarch64: Remove support for CSRE
2021-01-08 Nick CliftonTreat the AArch64 register id_aa64mmfr2_el1 as a core...
2021-01-01 Alan ModraUpdate year range in copyright notice of binutils files
2020-11-09 Przemyslaw Wirkusaarch64: Update LS64 feature with system register
2020-11-09 Przemyslaw Wirkusaarch64: Limit Rt register number for LS64 load/store...
2020-11-04 Przemyslaw Wirkusaarch64: Update feature RAS system registers
2020-10-28 Przemyslaw Wirkusaarch64: Add CSR PDEC instruction
2020-10-28 Przemyslaw Wirkusaarch64: Add DSB instruction Armv8.7-a variant
2020-10-22 Przemyslaw Wirkus[PATCH][GAS][AArch64] Define BRBE system registers
2020-10-22 Przemyslaw Wirkusaarch64: Define CSRE system registers
2020-09-28 Przemyslaw WirkusThis patch introduces ETMv4 (Embedded Trace Macrocell...
2020-09-28 Przemyslaw WirkusThis patch introduces ETE (Embedded Trace Extension...
2020-09-28 Przemyslaw WirkusThis patch introduces TRBE (Trace Buffer Extension...
2020-09-08 Alex Coplanaarch64: Add support for Armv8-R system registers
2020-08-12 Alex Coplanaarch64: Add support for MPAM system registers
2020-08-10 Przemyslaw Wirkus[aarch64] GAS doesn't validate the architecture version...
2020-06-11 Alex Coplan[PATCH]: aarch64: Refactor representation of system...
2020-04-30 Alex CoplanAArch64: add GAS support for UDF instruction
2020-04-20 Sudakshina Das[AArch64, Binutils] Add missing TSB instruction
2020-02-26 Alan ModraIndent labels
2020-01-01 Alan ModraUpdate year range in copyright notice of binutils files
2019-12-17 Alan Modraubsan: aarch64: left shift cannot be represented in...
2019-11-11 Jan BeulichArm64: fix build with old glibc
2019-11-07 Matthew Malcomson[binutils][aarch64] Matrix Multiply extension enablemen...
2019-11-07 Matthew Malcomson[binutils][aarch64] Bfloat16 enablement [2/X]
2019-10-30 Delia BurduvModify the ARNM assembler to accept the omission of...
2019-08-22 Kyrylo Tkachov[AArch64][gas] Update MTE system register encodings
2019-07-23 Kyrylo Tkachov[AArch64] Add support for GMID_EL1 register for +memtag
2019-07-02 Richard Sandiford[AArch64] Fix bogus MOVPRFX warning for GPR form of CPY
2019-05-09 Matthew Malcomson[binutils][aarch64] New SVE_SHLIMM_UNPRED_22 operand.
2019-05-09 Matthew Malcomson[binutils][aarch64] New SVE_Zm4_11_INDEX operand.
2019-05-09 Matthew Malcomson[binutils][aarch64] New SVE_SHRIMM_UNPRED_22 operand.
2019-05-09 Matthew Malcomson[binutils][aarch64] New sve_size_sd2 iclass.
2019-05-09 Matthew Malcomson[binutils][aarch64] New SVE_ADDR_ZX operand.
2019-05-09 Matthew Malcomson[binutils][aarch64] New SVE_Zm3_11_INDEX operand.
2019-05-09 Matthew Malcomson[binutils][aarch64] New iclass sve_size_hsd2.
2019-05-09 Matthew Malcomson[binutils][aarch64] Introduce SVE_IMM_ROT3 operand.
2019-05-09 Matthew Malcomson[binutils][aarch64] Allow movprfx for SVE2 instructions.
2019-05-01 Sudakshina Das[BINUTILS, AArch64] Enable Transactional Memory Extension
2019-04-11 Sudakshina Das[BINUTILS, AArch64, 2/2] Update Store Allocation Tag...
2019-02-07 Tamar ChristinaAArch64: Add verifier for By elem Single and Double...
2019-01-25 Sudi DasAArch64: Remove ldgv and stgv instructions from Armv8...
2019-01-01 Alan ModraUpdate year range in copyright notice of binutils files
2018-12-18 Alan ModraInclude bfd_stdint.h in bfd.h
2018-11-12 Sudakshina Das[BINUTILS, AARCH64, 8/8] Add data cache instructions...
2018-11-12 Sudakshina Das[BINUTILS, AARCH64, 7/8] Add system registers for Memor...
2018-11-12 Sudakshina Das[BINUTILS, AARCH64, 6/8] Add Tag getting instruction...
2018-11-12 Sudakshina Das[BINUTILS, AARCH64, 4/8] Add Tag setting instructions...
2018-11-12 Sudakshina Das[BINUTILS, AARCH64, 2/8] Add Tag generation instruction...
2018-10-16 Matthew MalcomsonAArch64: Fix error checking for SIMD udot (by element)
2018-10-09 Sudakshina Das[PATCH, BINUTULS, AARCH64, 9/9] Add SSBS to MSR/MRS
2018-10-09 Sudakshina Das[PATCH, BINUTILS, AARCH64, 8/9] Add SCXTNUM_ELx and...
2018-10-09 Sudakshina Das[PATCH, BINUTILS, AARCH64, 7/9] Add BTI instruction
2018-10-09 Sudakshina Das[PATCH, BINUTILS, AARCH64, 6/9] Add Random number instr...
2018-10-09 Sudakshina Das[PATCH, BINUTILS, AARCH64, 5/9] Add DC CVADP instruction
2018-10-09 Sudakshina Das[PATCH, BINUTILS, AARCH64, 4/9] Add Execution and Data...
2018-10-08 Tamar ChristinaAArch64: Replace C initializers with memset
2018-10-03 Tamar ChristinaAArch64: Constraint disassembler and assembler changes.
2018-10-03 Tamar ChristinaAArch64: Add SVE constraints verifier.
2018-10-03 Tamar ChristinaAArch64: Refactor verifiers to make more general.
2018-07-06 Tamar ChristinaFix the read/write flag for these registers on AArch64
2018-06-29 Tamar ChristinaFix AArch64 encodings for by element instructions.
2018-05-15 Tamar ChristinaImplement Read/Write constraints on system registers...
2018-05-15 Tamar ChristinaAllow non-fatal errors to be emitted and for disassembl...
2018-05-15 Tamar ChristinaModify AArch64 Assembly and disassembly functions to...
2018-03-28 Nick CliftonEnhance the AARCH64 assembler to support LDFF1xx instru...
2018-01-03 Alan ModraUpdate year range in copyright notice of binutils files
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