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Add M32R_ARG_REGISTER_SIZE
[binutils-gdb.git]
/
opcodes
/
i386-init.h
2017-03-06
H.J. Lu
Add support for Intel CET instructions
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2017-01-12
Igor Tsimbalist
Enable Intel AVX512_VPOPCNTDQ instructions
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2017-01-02
Alan Modra
Update year range in copyright notice of all files.
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2016-11-02
Igor Tsimbalist
Enable Intel AVX512_4VNNIW instructions
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2016-11-02
Igor Tsimbalist
Enable Intel AVX512_4FMAPS instructions
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2016-10-21
H.J. Lu
X86: Remove pcommit instruction
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2016-09-07
H.J. Lu
X86: Allow additional ISAs for IAMCU in assembler
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2016-08-24
H.J. Lu
X86: Add ptwrite instruction
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2016-05-29
H.J. Lu
Add .noavx512XX directives to x86 assembler
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2016-05-27
H.J. Lu
Update x86 CPU_XXX_FLAGS handling
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2016-05-27
H.J. Lu
Replace CpuAMD64/CpuIntel64 with AMD64/Intel64
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2016-05-25
H.J. Lu
Enable VREX for all AVX512 directives
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2016-05-25
H.J. Lu
Enable VREX for AVX512 directives
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2016-05-25
H.J. Lu
Reimplement .no87/.nommx/.nosse/.noavx directives
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2016-05-10
Alexander Fomin
Enable Intel RDPID instruction.
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2016-01-01
Alan Modra
Copyright update for binutils
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2015-12-09
H.J. Lu
Implement Intel OSPKE instructions
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2015-08-07
Amit Pawar
Remove CpuFMA4 support from CPU_ZNVER1_FLAGS.
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2015-06-30
Amit Pawar
Add support for monitorx/mwaitx instructions
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2015-05-15
H.J. Lu
Support AMD64/Intel ISAs in assembler/disassembler
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2015-05-11
H.J. Lu
Add Intel MCU support to opcodes
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2015-03-17
Ganesh Gopalasubra...
Add znver1 processor
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2015-01-01
Alan Modra
ChangeLog rotatation and copyright year update
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2014-11-17
Ilya Tocar
Add AVX512VBMI instructions
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2014-11-17
Ilya Tocar
Add AVX512IFMA instructions
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2014-11-17
Ilya Tocar
Add pcommit instruction
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2014-11-17
Ilya Tocar
Add clwb instruction
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2014-07-22
Ilya Tocar
Add AVX512DQ instructions and their AVX512VL variants.
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2014-07-22
Ilya Tocar
Add support for AVX512BW instructions and their AVX512V...
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2014-07-22
Ilya Tocar
Add support for AVX512VL. Add AVX512VL versions of...
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2014-04-04
Ilya Tocar
Add support for Intel SGX instructions
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2014-03-05
Alan Modra
Update copyright years
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2014-02-21
Ilya Tocar
Add support for CPUID PREFETCHWT1
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2014-02-19
H.J. Lu
Don't output trailing space
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2014-02-12
Ilya Tocar
Add clflushopt, xsaves, xsavec, xrstors
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2013-11-08
H.J. Lu
Remove CpuNop from CPU_K6_2_FLAGS
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2013-09-30
Saravanan Ekanathan
Add AMD bdver4 support.
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2013-07-26
H.J. Lu
Add Intel AVX-512 support
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2013-07-25
H.J. Lu
Support Intel SHA
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2013-07-24
H.J. Lu
Support Intel MPX
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2013-05-15
Saravanan Ekanathan
gas/
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2013-02-19
H.J. Lu
Implement Intel SMAP instructions
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2013-01-16
H.J. Lu
Add OPERAND_TYPE_IMM32_64
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2012-10-09
Nagajyothi Eggone
Add AMD bdver3 support.
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2012-09-25
H.J. Lu
Add missing Cpu flags in bd and bt cores
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2012-09-20
H.J. Lu
Replace CpuSSE3 with CpuCX16 for cmpxchg16b
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2012-08-17
H.J. Lu
Add AMD btver1 and btver2 support
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2012-08-10
H.J. Lu
Enable FMA instructions for bdver2
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2012-07-16
H.J. Lu
Implement RDRSEED, ADX and PRFCHW instructions
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2012-02-08
H.J. Lu
Implement Intel Transactional Synchronization Extensions
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2012-01-13
H.J. Lu
Add vmfunc
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2011-07-22
H.J. Lu
Add initial Intel K1OM support.
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2011-06-10
H.J. Lu
Support AVX Programming Reference (June, 2011).
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2011-06-03
Quentin Neill
Add CpuF16C to CPU_BDVER2_FLAGS.
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2011-05-11
Quentin Neill
2011-05-10 Quentin Neill <quentin.neill@amd.com>
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2011-04-20
H.J. Lu
Regenerate i386-init.h.
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2011-01-18
Jan Kratochvil
opcodes/
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2011-01-05
H.J. Lu
Implement BMI instructions.
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2010-10-16
H.J. Lu
Add CpuNop to CPU_GENERIC64_FLAGS.
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2010-08-06
H.J. Lu
Don't generate multi-byte NOPs for i686.
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2010-07-01
H.J. Lu
Support AVX Programming Reference (June, 2010)
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2010-03-23
Sebastian Pop
2010-03-22 Sebastian Pop <sebastian.pop@amd.com>
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2010-02-11
Sebastian Pop
2010-02-10 Quentin Neill <quentin.neill@amd.com>
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2010-02-03
Sebastian Pop
2010-02-03 Quentin Neill <quentin.neill@amd.com>
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2010-01-06
Sebastian Pop
2010-01-06 Quentin Neill <quentin.neill@amd.com>
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2009-11-18
Sebastian Pop
2009-11-18 Sebastian Pop <sebastian.pop@amd.com>
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2009-11-18
Sebastian Pop
2009-11-17 Sebastian Pop <sebastian.pop@amd.com>
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2009-11-05
Sebastian Pop
2009-11-05 Sebastian Pop <sebastian.pop@amd.com>
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2009-07-25
H.J. Lu
bfd/
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2009-07-24
Jan Beulich
gas/
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2009-07-06
Dwarakanath Rajagopal
<gas changes>
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2009-05-22
Dwarakanath Rajagopal
<gas changes>
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2009-02-23
H.J. Lu
gas/
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2009-01-10
H.J. Lu
gas/
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2009-01-09
H.J. Lu
gas/
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2009-01-06
H.J. Lu
2009-01-05 H.J. Lu <hongjiu.lu@intel.com>
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2008-05-02
H.J. Lu
gas/
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2008-04-04
H.J. Lu
gas/
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2008-04-03
H.J. Lu
binutils/
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2008-02-16
H.J. Lu
gas/
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2008-02-12
H.J. Lu
gas/
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2008-02-12
H.J. Lu
gas/testsuite/
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2008-01-23
H.J. Lu
gas/
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2008-01-22
H.J. Lu
gas/
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2008-01-22
H.J. Lu
gas/
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2008-01-15
H.J. Lu
gas/
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2008-01-12
H.J. Lu
gas/testsuite/
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2008-01-04
H.J. Lu
2008-01-04 H.J. Lu <hongjiu.lu@intel.com>
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2008-01-04
H.J. Lu
gas/
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2008-01-03
H.J. Lu
gas/testsuite/
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2007-12-28
H.J. Lu
gas/testsuite/
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2007-10-05
H.J. Lu
gas/testsuite/
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2007-09-14
Michael Meissner
Add AMD SSE5 support
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2007-09-09
H.J. Lu
gas/
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