2023-11-09 |
Jan Beulich | x86: rework UWRMSR operand swapping |
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2023-11-09 |
Jan Beulich | x86: do away with is_evex_encoding() |
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2023-11-09 |
Jan Beulich | x86: split insn templates' CPU field |
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2023-10-31 |
Hu, Lin1 | Support Intel USER_MSR |
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2023-09-27 |
Jan Beulich | x86: fold FMA VEX and EVEX templates |
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2023-09-27 |
Jan Beulich | x86: fold VAES/VPCLMULQDQ VEX and EVEX templates |
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2023-09-27 |
Jan Beulich | x86: fold certain VEX and EVEX templates |
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2023-09-15 |
Jan Beulich | x86: fold CpuLM and Cpu64 |
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2023-09-14 |
Jan Beulich | x86: support AVX10.1 vector size restrictions |
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2023-09-14 |
Jan Beulich | x86: make AES/PCMULQDQ respectively prereqs of VAES... |
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2023-09-01 |
Jan Beulich | x86: drop Size64 from VMOVQ |
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2023-08-11 |
Jan Beulich | x86: pack CPU flags in opcode table |
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2023-08-02 |
Sam James | Revert "2.41 Release sources" |
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2023-08-02 |
Nick Clifton | 2.41 Release sources |
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2023-07-27 |
Hu, Lin1 | Support Intel PBNDKB |
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2023-07-27 |
Haochen Jiang | Support Intel SM4 |
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2023-07-27 |
Haochen Jiang | Support Intel SM3 |
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2023-07-27 |
Haochen Jiang | Support Intel SHA512 |
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2023-07-27 |
konglin1 | Support Intel AVX-VNNI-INT16 |
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2023-07-04 |
Jan Beulich | x86: optimize 128-bit VPBROADCASTQ to VPUNPCKLQDQ |
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2023-07-04 |
Jan Beulich | x86: optimize pre-AVX512 {,V}PCMPGT* with identical... |
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2023-07-04 |
Jan Beulich | x86: optimize pre-AVX512 {,V}PCMPEQQ with identical... |
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2023-06-16 |
Jan Beulich | x86: shrink Masking insn attribute to a single bit... |
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2023-05-23 |
Zhang, Jun | Support Intel FRED LKGS |
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2023-04-07 |
Haochen Jiang | Support Intel AMX-COMPLEX |
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2023-03-31 |
Jan Beulich | x86: introduce .insn directive |
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2023-03-20 |
Jan Beulich | x86: VexVVVV is now merely a boolean |
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2023-03-20 |
Jan Beulich | x86: re-work build_modrm_byte()'s register assignment |
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2023-02-24 |
Jan Beulich | x86: MONITOR/MWAIT are not SSE3 insns |
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2023-02-24 |
Jan Beulich | x86-64: don't permit LAHF/SAHF with "generic64" |
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2023-02-24 |
Jan Beulich | x86: have insns acting on segment selector values allow... |
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2023-02-24 |
Jan Beulich | x86: restrict insn templates accepting negative 8-bit... |
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2023-02-22 |
Jan Beulich | x86-64: LAR and LSL don't need REX.W |
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2023-02-22 |
Jan Beulich | x86: optimize BT{,C,R,S} $imm,%reg |
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2023-02-14 |
Jan Beulich | x86: {LD,ST}TILECFG use an extension opcode |
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2023-02-13 |
Michael Matz | PR30120: fix x87 fucomp misassembled |
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2023-02-10 |
Jan Beulich | x86: drop use of VEX3SOURCES |
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2023-02-10 |
Jan Beulich | x86: drop use of XOP2SOURCES |
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2023-02-10 |
Jan Beulich | x86: limit use of XOP2SOURCES |
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2023-02-10 |
Jan Beulich | x86: move (and rename) opcodespace attribute |
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2023-01-27 |
Jan Beulich | x86: use ModR/M for FPU insns with operands |
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2023-01-20 |
Jan Beulich | x86: re-use insn mnemonic strings as much as possible |
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2023-01-20 |
Jan Beulich | x86: move insn mnemonics to a separate table |
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2023-01-01 |
Alan Modra | Update year range in copyright notice of binutils files |
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2022-12-16 |
Jan Beulich | x86: change representation of extension opcode |
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2022-12-12 |
Jan Beulich | x86: further re-work insn/suffix recognition to also... |
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2022-12-12 |
Jan Beulich | x86: drop (now) stray IsString |
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2022-12-12 |
Jan Beulich | x86: re-work insn/suffix recognition |
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2022-12-12 |
Jan Beulich | x86: generate template sets data at build time |
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2022-12-12 |
Jan Beulich | x86: drop sentinel from i386_optab[] |
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2022-12-12 |
Jan Beulich | x86: instantiate i386_{op,reg}tab[] in gas instead... |
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2022-12-03 |
H.J. Lu | x86: Allow 16-bit register source for LAR and LSL |
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2022-12-02 |
Jan Beulich | x86: also use D for XCHG and TEST |
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2022-12-01 |
Jan Beulich | x86: drop No_ldSuf |
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2022-12-01 |
Jan Beulich | x86/Intel: drop LONG_DOUBLE_MNEM_SUFFIX |
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2022-12-01 |
Jan Beulich | x86/Intel: restrict use of LONG_DOUBLE_MNEM_SUFFIX |
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2022-11-30 |
Jan Beulich | x86: clean up after removal of support for gcc <= 2.8.1 |
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2022-11-30 |
Jan Beulich | x86: drop FloatR |
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2022-11-24 |
Jan Beulich | x86: widen applicability and use of CheckRegSize |
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2022-11-24 |
Jan Beulich | x86: add missing CheckRegSize |
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2022-11-24 |
Jan Beulich | x86: correct handling of LAR and LSL |
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2022-11-15 |
Tejas Joshi | Add AMD znver4 processor support |
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2022-11-14 |
Jan Beulich | x86: fold special-operand insn attributes into a single... |
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2022-11-11 |
Jan Beulich | x86: drop stray IsString from PadLock insns |
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2022-11-08 |
Kong Lingling | Support Intel RAO-INT |
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2022-11-04 |
konglin1 | Support Intel AVX-NE-CONVERT |
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2022-11-02 |
Jan Beulich | x86: drop bogus Tbyte |
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2022-11-02 |
Hu, Lin1 | Support Intel MSRLIST |
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2022-11-02 |
Hu, Lin1 | Support Intel WRMSRNS |
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2022-11-02 |
Haochen Jiang | Support Intel CMPccXADD |
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2022-11-02 |
Cui,Lili | Support Intel AVX-VNNI-INT8 |
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2022-11-02 |
Hongyu Wang | Support Intel AVX-IFMA |
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2022-10-31 |
Cui, Lili | Support Intel PREFETCHI |
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2022-10-21 |
Cui,Lili | Support Intel AMX-FP16 |
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2022-10-20 |
Jan Beulich | x86: re-work AVX-VNNI support |
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2022-09-30 |
Jan Beulich | x86/Intel: restrict suffix derivation |
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2022-08-16 |
Jan Beulich | x86: template-ize certain vector conversion insns |
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2022-08-16 |
Jan Beulich | x86: template-ize vector packed byte/word integer insns |
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2022-08-16 |
Jan Beulich | x86: re-order AVX512 S/G templates |
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2022-08-16 |
Jan Beulich | x86: template-ize vector packed dword/qword integer... |
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2022-08-16 |
Jan Beulich | x86: template-ize packed/scalar vector floating point... |
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2022-08-09 |
Jan Beulich | x86-64: adjust MOVQ to/from SReg attributes |
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2022-08-09 |
Jan Beulich | x86: adjust MOVSD attributes |
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2022-08-09 |
Jan Beulich | x86: fold AVX VGATHERDPD / VPGATHERDQ |
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2022-08-09 |
Jan Beulich | x86: allow use of broadcast with X/Y/Z-suffixed AVX512... |
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2022-08-09 |
Jan Beulich | x86/Intel: split certain AVX512-FP16 VCVT*2PH templates |
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2022-08-03 |
Jan Beulich | x86: properly mark i386-only insns |
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2022-08-03 |
Jan Beulich | x86: also use D for MOVBE |
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2022-08-02 |
Jan Beulich | x86: XOP shift insns don't really allow B suffix |
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2022-08-01 |
Jan Beulich | x86: SKINIT with operand needs IgnoreSize |
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2022-07-29 |
Jan Beulich | x86: drop stray NoRex64 from KeyLocker insns |
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2022-07-21 |
Jan Beulich | x86: replace wrong attributes on VCVTDQ2PH{X,Y} |
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2022-07-21 |
Jan Beulich | x86/Intel: correct AVX512F scatter insn element sizes |
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2022-07-18 |
Jan Beulich | x86: correct VMOVSH attributes |
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2022-07-18 |
Jan Beulich | x86: re-order insn template fields |
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2022-07-06 |
Jan Beulich | x86: make D attribute usable for XOP and FMA4 insns |
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2022-07-04 |
Jan Beulich | x86: fold Disp32S and Disp32 |
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2022-06-29 |
Jan Beulich | x86: drop stray NoRex64 from XBEGIN |
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2022-05-27 |
Jan Beulich | x86: re-work AVX512 embedded rounding / SAE |
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2022-04-27 |
Jan Beulich | x86: VFPCLASSSH is Evex.LLIG |
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