| 2022-10-14 |
Tsukasa OI | opcodes/riscv-dis.c: Tidying with spacing |
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| 2022-10-14 |
Tsukasa OI | opcodes/riscv-dis.c: Tidying with comments/clarity |
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| 2022-10-06 |
Tsukasa OI | RISC-V: Print XTheadMemPair literal as "immediate" |
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| 2022-10-06 |
Tsukasa OI | RISC-V: Fix T-Head immediate types on printing |
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| 2022-10-06 |
Tsukasa OI | RISC-V: Print comma and tabs as the "text" style |
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| 2022-10-06 |
Tsukasa OI | RISC-V: Optimize riscv_disassemble_data printf |
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| 2022-10-06 |
Tsukasa OI | RISC-V: Fix printf argument types corresponding %x |
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| 2022-10-06 |
Tsukasa OI | RISC-V: Fix immediates to have "immediate" style |
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| 2022-10-04 |
Tsukasa OI | RISC-V: Fix buffer overflow on print_insn_riscv |
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| 2022-10-04 |
Andrew Burgess | opcodes/riscv: style csr names as registers |
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| 2022-09-30 |
Jan Beulich | RISC-V: fix build after "Add support for arbitrary... |
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| 2022-09-22 |
Christoph Müllner | RISC-V: Add support for literal instruction arguments |
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| 2022-09-22 |
Christoph Müllner | RISC-V: Add support for arbitrary immediate encoding... |
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| 2022-09-22 |
Tsukasa OI | RISC-V: Remove "b" operand type from disassembler |
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| 2022-09-06 |
Tsukasa OI | opcodes: Add non-enum disassembler options |
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| 2022-09-02 |
Tsukasa OI | RISC-V: Print highest address (-1) on the disassembler |
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| 2022-09-02 |
Tsukasa OI | RISC-V: PR29342, Fix RV32 disassembler address computation |
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| 2022-07-07 |
Tsukasa OI | RISC-V: Fix disassembling Zfinx with -M numeric |
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| 2022-04-30 |
Thomas Hebb | opcodes: don't assume ELF in riscv, csky, rl78, mep... |
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| 2022-04-04 |
Andrew Burgess | opcodes/riscv: implement style support in the disassembler |
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| 2022-03-18 |
Tsukasa OI | RISC-V: Prefetch hint instructions and operand set |
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| 2022-01-02 |
Alan Modra | Update year range in copyright notice of binutils files |
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| 2021-11-30 |
Nelson Chu | RISC-V: The vtype immediate with more than the defined... |
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| 2021-11-30 |
Nelson Chu | RISC-V: Dump vset[i]vli immediate as numbers once vsew... |
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| 2021-11-26 |
Andrew Burgess | opcodes/riscv: add disassembler options support to... |
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| 2021-11-18 |
jiawei | RISC-V: Add instructions and operand set for z[fdq]inx |
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| 2021-11-17 |
Nelson Chu | RISC-V: Support rvv extension with released version... |
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| 2021-11-16 |
jiawei | RISC-V: Scalar crypto instructions and operand set. |
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| 2021-11-11 |
Nelson Chu | RISC-V: Dump objects according to the elf architecture... |
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| 2021-10-27 |
Nelson Chu | RISC-V: Tidy riscv assembler and disassembler. |
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| 2021-09-20 |
Andrew Burgess | riscv: print .2byte or .4byte before an unknown instruc... |
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| 2021-09-09 |
Jim Wilson | RISC-V: Pretty print values formed with lui and addiw. |
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| 2021-08-30 |
Nelson Chu | RISC-V: PR28291, Fix the gdb fails that PR27916 caused. |
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| 2021-08-30 |
Nelson Chu | RISC-V: PR27916, Support mapping symbols. |
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| 2021-05-18 |
Job Noorman | RISC-V: PR27814, Objdump crashes when disassembling... |
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| 2021-03-31 |
Alan Modra | Use bool in opcodes |
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| 2021-03-31 |
Alan Modra | Remove bfd_stdint.h |
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| 2021-02-19 |
Nelson Chu | RISC-V: PR27158, fixed UJ/SB types and added CSS/CL... |
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| 2021-02-18 |
Nelson Chu | RISC-V: Add bfd/cpu-riscv.h to support all spec version... |
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| 2021-01-15 |
Nelson Chu | RISC-V: Error and warning messages tidy. |
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| 2021-01-15 |
Nelson Chu | RISC-V: Comments tidy and improvement. |
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| 2021-01-01 |
Alan Modra | Update year range in copyright notice of binutils files |
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| 2020-12-10 |
Nelson Chu | RISC-V: Dump CSR according to the elf privileged spec... |
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| 2020-06-30 |
Nelson Chu | RISC-V: Support debug and float CSR as the unprivileged... |
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| 2020-06-22 |
Nelson Chu | RISC-V: Report warning when linking the objects with... |
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| 2020-05-20 |
Nelson Chu | [PATCH v2 0/9] RISC-V: Support version controling for... |
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| 2020-02-21 |
Nelson Chu | RISC-V: Support the ISA-dependent CSR checking. |
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| 2020-01-01 |
Alan Modra | Update year range in copyright notice of binutils files |
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| 2019-06-27 |
Jim Wilson | RISC-V: Make objdump disassembly work right for binary... |
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| 2019-01-01 |
Alan Modra | Update year range in copyright notice of binutils files |
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| 2018-12-18 |
Alan Modra | Include bfd_stdint.h in bfd.h |
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| 2018-12-06 |
Andrew Burgess | opcodes/riscv: Hide '.L0 ' fake symbols |
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| 2018-12-03 |
Jim Wilson | RISC-V: Accept version, supervisor ext and more than... |
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| 2018-08-30 |
Jim Wilson | RISC-V: Allow instruction require more than one extension |
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| 2018-07-30 |
Jim Wilson | RISC-V: Set insn info fields correctly when disassembling. |
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| 2018-03-03 |
Alan Modra | opcodes error messages |
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| 2018-01-10 |
Jim Wilson | RISC-V: Disassemble x0 based addresses as 0. |
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| 2018-01-06 |
Jim Wilson | RISC-V: Print symbol address for jalr w/ zero offset. |
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| 2018-01-03 |
Alan Modra | Update year range in copyright notice of binutils files |
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| 2017-07-25 |
Nick Clifton | Fix typos in error and option messages in OPCODES library. |
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| 2017-05-24 |
Yao Qi | Move print_insn_XXX to an opcodes internal header |
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| 2017-05-04 |
Kito Cheng | RISC-V: Fix disassemble for c.li, c.andi and c.addiw |
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| 2017-04-04 |
Palmer Dabbelt | RISC-V: Resurrect GP-relative disassembly hints |
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| 2017-01-03 |
Dilyan Palauzov | Add fall through comment. |
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| 2017-01-02 |
Alan Modra | Update year range in copyright notice of all files. |
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| 2016-12-20 |
Andrew Waterman | Re-work RISC-V gas flags: now we just support -mabi... |
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| 2016-11-01 |
Nick Clifton | Add support for RISC-V architecture. |
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projects / binutils-gdb.git / history