2020-06-05 |
Alan Modra | bpf stack smashing detected |
tree | commitdiff |
2020-06-04 |
Jose E. Marchesi | cpu,gas,opcodes: remove no longer needed workaround... |
tree | commitdiff |
2020-06-04 |
Jose E. Marchesi | opcodes: discriminate endianness and insn-endianness... |
tree | commitdiff |
2020-06-04 |
Jose E. Marchesi | opcodes: support insn endianness in cgen_cpu_open |
tree | commitdiff |
2020-06-03 |
Nick Clifton | Updated Serbian translation for the opcodes sub-directory |
tree | commitdiff |
2020-06-03 |
Nelson Chu | RISC-V: Fix the error when building RISC-V linux native... |
tree | commitdiff |
2020-06-01 |
Alan Modra | Regen opcodes/bpf-desc.c |
tree | commitdiff |
2020-05-28 |
Jose E. Marchesi | cpu,opcodes: add instruction semantics to bpf.cpu and... |
tree | commitdiff |
2020-05-28 |
Alan Modra | ubsan: nios2: undefined shift |
tree | commitdiff |
2020-05-28 |
Alan Modra | asan: ns32k: use of uninitialized value |
tree | commitdiff |
2020-05-28 |
Nick Clifton | Fix a potential use of an uninitialised value in the... |
tree | commitdiff |
2020-05-27 |
Sandra Loosemore | Fix extraction of signed constants in nios2 disassemble... |
tree | commitdiff |
2020-05-26 |
Stefan Schulze Fri... | ChangeLog entries for f687f5f563 |
tree | commitdiff |
2020-05-26 |
Stefan Schulze Fri... | S/390: z13: Accept vector alignment hints |
tree | commitdiff |
2020-05-21 |
Alan Modra | Replace "if (x) free (x)" with "free (x)", opcodes |
tree | commitdiff |
2020-05-20 |
Nelson Chu | [PATCH v2 0/9] RISC-V: Support version controling for... |
tree | commitdiff |
2020-05-19 |
Peter Bergner | Power10 dcbf, sync, and wait extensions. |
tree | commitdiff |
2020-05-19 |
Stafford Horne | or1k: Regenerate opcodes after removing 32-bit support |
tree | commitdiff |
2020-05-11 |
Alan Modra | Power10 VSX scalar min-max-compare quad precision opera... |
tree | commitdiff |
2020-05-11 |
Alan Modra | Power10 VSX load/store rightmost element operations |
tree | commitdiff |
2020-05-11 |
Alan Modra | Power10 test lsb by byte operation |
tree | commitdiff |
2020-05-11 |
Alan Modra | Power10 string operations |
tree | commitdiff |
2020-05-11 |
Peter Bergner | Power10 Set boolean extension |
tree | commitdiff |
2020-05-11 |
Alan Modra | Power10 bit manipulation operations |
tree | commitdiff |
2020-05-11 |
Alan Modra | Power10 VSX PCV generate operations |
tree | commitdiff |
2020-05-11 |
Alan Modra | Power10 VSX Mask Manipulation Operations |
tree | commitdiff |
2020-05-11 |
Alan Modra | Power10 Reduced precision outer product operations |
tree | commitdiff |
2020-05-11 |
Alan Modra | Power10 SIMD permute class operations |
tree | commitdiff |
2020-05-11 |
Alan Modra | Power10 128-bit binary integer operations |
tree | commitdiff |
2020-05-11 |
Alan Modra | Power10 VSX 32-byte storage access |
tree | commitdiff |
2020-05-11 |
Alan Modra | Power10 vector integer multiply, divide, modulo insns |
tree | commitdiff |
2020-05-11 |
Peter Bergner | Power10 byte reverse instructions |
tree | commitdiff |
2020-05-11 |
Peter Bergner | Power10 Copy/Paste Extensions |
tree | commitdiff |
2020-05-11 |
Peter Bergner | Power10 Add new L operand to the slbiag instruction |
tree | commitdiff |
2020-05-11 |
Alan Modra | PowerPC Default disassembler to -Mpower10 |
tree | commitdiff |
2020-05-11 |
Alan Modra | PowerPC Rename powerxx to power10 |
tree | commitdiff |
2020-05-11 |
Nick Clifton | Updated French translation for the ld sub-directory... |
tree | commitdiff |
2020-04-30 |
Alex Coplan | AArch64: add GAS support for UDF instruction |
tree | commitdiff |
2020-04-29 |
Nick Clifton | Also use unsigned 8-bit immediate values for the LDRC... |
tree | commitdiff |
2020-04-29 |
Nick Clifton | Updated Serbian translation for the binutils sub-direct... |
tree | commitdiff |
2020-04-29 |
Nick Clifton | Fix the disassmbly of SH instructions which have an... |
tree | commitdiff |
2020-04-21 |
Andreas Schwab | Disallow PC relative for CMPI on MC68000/10 |
tree | commitdiff |
2020-04-20 |
Sudakshina Das | [AArch64, Binutils] Add missing TSB instruction |
tree | commitdiff |
2020-04-20 |
Sudakshina Das | [AArch64, Binutils] Make hint space instructions valid... |
tree | commitdiff |
2020-04-17 |
Fredrik Strupe | [PATCH v2] binutils: arm: Fix disassembly of conditiona... |
tree | commitdiff |
2020-04-16 |
David Faust | cpu,gas,opcodes: support for eBPF JMP32 instruction... |
tree | commitdiff |
2020-04-07 |
Cui,Lili | Add support for intel TSXLDTRK instructions$ |
tree | commitdiff |
2020-04-02 |
LiliCui | Add support for intel SERIALIZE instruction |
tree | commitdiff |
2020-03-26 |
Alan Modra | Re: H8300 use of uninitialised value |
tree | commitdiff |
2020-03-26 |
Alan Modra | Re: ARC: Use of uninitialised value |
tree | commitdiff |
2020-03-24 |
Alan Modra | Uninitialised memory read in z80-dis.c |
tree | commitdiff |
2020-03-22 |
Alan Modra | H8300 use of uninitialised value |
tree | commitdiff |
2020-03-22 |
Alan Modra | ARC: Use of uninitialised value |
tree | commitdiff |
2020-03-22 |
Alan Modra | NS32K arg_bufs uninitialised |
tree | commitdiff |
2020-03-22 |
Alan Modra | s12z disassembler tidy |
tree | commitdiff |
2020-03-20 |
Alan Modra | metag uninitialized memory read |
tree | commitdiff |
2020-03-20 |
Alan Modra | NDS32 disassembly of odd sized sections |
tree | commitdiff |
2020-03-20 |
Alan Modra | PowerPC disassembly of odd sized sections |
tree | commitdiff |
2020-03-17 |
Nick Clifton | Replace a couple of assertions in the BFD library that... |
tree | commitdiff |
2020-03-17 |
Sergey Belyashov | Fix a small set of Z80 problems. |
tree | commitdiff |
2020-03-13 |
Jan Beulich | x86-64: correct mis-named X86_64_0D enumerator |
tree | commitdiff |
2020-03-09 |
H.J. Lu | x86: Also pass -P to $(CPP) when processing i386-opc.tbl |
tree | commitdiff |
2020-03-09 |
Jan Beulich | x86: use template for AVX512 integer comparison insns |
tree | commitdiff |
2020-03-09 |
Jan Beulich | x86: use template for XOP integer comparison, shift... |
tree | commitdiff |
2020-03-09 |
Jan Beulich | x86: use template for AVX/AVX512 floating point compari... |
tree | commitdiff |
2020-03-09 |
Jan Beulich | x86: use template for SSE floating point comparison... |
tree | commitdiff |
2020-03-09 |
Jan Beulich | x86: allow opcode templates to be templated |
tree | commitdiff |
2020-03-06 |
Jan Beulich | x86: reduce amount of various VCVT* templates |
tree | commitdiff |
2020-03-06 |
Jan Beulich | x86: drop/replace IgnoreSize |
tree | commitdiff |
2020-03-06 |
Jan Beulich | x86: don't accept FI{LD,STP,STTP}LL in Intel syntax... |
tree | commitdiff |
2020-03-06 |
Jan Beulich | x86: replace NoRex64 on VEX-encoded insns |
tree | commitdiff |
2020-03-06 |
Jan Beulich | x86: drop Rex64 attribute |
tree | commitdiff |
2020-03-06 |
Jan Beulich | x86: correct MPX insn w/o base or index encoding in... |
tree | commitdiff |
2020-03-06 |
Jan Beulich | x86: add missing IgnoreSize |
tree | commitdiff |
2020-03-06 |
Jan Beulich | x86: refine TPAUSE and UMWAIT |
tree | commitdiff |
2020-03-04 |
Jan Beulich | x86: support VMGEXIT |
tree | commitdiff |
2020-03-03 |
H.J. Lu | x86: Replace IgnoreSize/DefaultSize with MnemonicSize |
tree | commitdiff |
2020-03-03 |
Sergey Belyashov | The patch fixed invalid compilation of instruction... |
tree | commitdiff |
2020-03-03 |
H.J. Lu | x86: Allow integer conversion without suffix in AT... |
tree | commitdiff |
2020-02-26 |
Alan Modra | Indent labels |
tree | commitdiff |
2020-02-25 |
Claudiu Zissulescu | [ARC][committed] Update int_vector_base aux register. |
tree | commitdiff |
2020-02-21 |
Nelson Chu | RISC-V: Support the ISA-dependent CSR checking. |
tree | commitdiff |
2020-02-19 |
Jim Wilson | RISC-V: Convert the ADD/ADDI to the compressed MV/LI... |
tree | commitdiff |
2020-02-17 |
H.J. Lu | x86: Remove CpuABM and add CpuPOPCNT |
tree | commitdiff |
2020-02-17 |
Jan Beulich | x86: fold certain VCVT{,U}SI2S{S,D} templates |
tree | commitdiff |
2020-02-17 |
Jan Beulich | x86: fold AddrPrefixOpReg templates |
tree | commitdiff |
2020-02-17 |
Jan Beulich | x86/Intel: improve diagnostics for ambiguous VCVT*... |
tree | commitdiff |
2020-02-17 |
H.J. Lu | x86: Don't disable SSE3 when disabling SSE4a |
tree | commitdiff |
2020-02-17 |
Alan Modra | Re: x86: Don't disable SSE4a when disabling SSE4 |
tree | commitdiff |
2020-02-16 |
H.J. Lu | x86: Don't disable SSE4a when disabling SSE4 |
tree | commitdiff |
2020-02-14 |
H.J. Lu | Remove Intel syntax comments on movsx and movzx |
tree | commitdiff |
2020-02-14 |
Jan Beulich | x86: replace adhoc (partly wrong) ambiguous operand... |
tree | commitdiff |
2020-02-13 |
Jan Beulich | x86: fix SSE4a dependencies of ".arch .nosse*" |
tree | commitdiff |
2020-02-12 |
Jan Beulich | x86: correct VFPCLASSP{S,D} operand size handling |
tree | commitdiff |
2020-02-12 |
Jan Beulich | x86: fold two JMP templates |
tree | commitdiff |
2020-02-12 |
Jan Beulich | x86-64: Intel64 adjustments for insns dealing with... |
tree | commitdiff |
2020-02-11 |
Jan Beulich | x86: drop ShortForm attribute |
tree | commitdiff |
2020-02-11 |
Jan Beulich | x86: drop stray ShortForm attributes |
tree | commitdiff |
2020-02-11 |
Alan Modra | Ensure *valuep always written by extract_normal return |
tree | commitdiff |
2020-02-10 |
Matthew Malcomson | [binutils][arm] Implement Custom Datapath Extensions... |
tree | commitdiff |
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