https://bugs.libre-soc.org/show_bug.cgi?id=985
[libreriscv.git] / openpower / sv / biginteger / divmnu64.c
2022-09-29 Jacob Lifshayrename madded->maddedu for consistency with PowerISA...
2022-04-27 Jacob Lifshayfix UB
2022-04-27 Jacob Lifshayclean up code
2022-04-27 Jacob Lifshayformat code
2022-04-26 Luke Kenneth Casso... start splitting out bigops
2022-04-26 Jacob Lifshayswitch to using divrem_64_by_32 which follows semantics...
2022-04-26 Jacob Lifshayfix UB caused by lkcl in 1afca349cc91beebe7fd04260e0f9e...
2022-04-26 Jacob Lifshayformat code
2022-04-25 Luke Kenneth Casso... https://bugs.libre-soc.org/show_bug.cgi?id=817#c31
2022-04-25 Luke Kenneth Casso... use shift-and-or rather than mul-and-add in
2022-04-24 Luke Kenneth Casso... use div/rem rather than re-calculate modulo from multiply
2022-04-22 Jacob Lifshayformat code
2022-04-22 Luke Kenneth Casso... clarify estimate through explicit variable containing
2022-04-22 Jacob Lifshaycheck for expected divmnu failures
2022-04-22 Jacob Lifshayconvert divmnu64.c tests to be easier to understand
2022-04-22 Jacob Lifshayadd sv.madded sv.subfe to divmnu64.c
2022-04-22 Jacob Lifshayformat with clang-format-13
2022-04-22 Jacob Lifshayadd stuff for clang-format
2022-04-19 Luke Kenneth Casso... move c code to biginteger