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(no commit message)
[libreriscv.git]
/
openpower
/
sv
/
svp_rewrite
/
svp64.mdwn
2020-12-16
lkcl
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2020-12-16
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2020-12-16
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2020-12-16
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2020-12-16
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2020-12-16
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2020-12-16
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2020-12-16
lkcl
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2020-12-16
lkcl
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2020-12-16
Jacob Lifshay
expand on comment explanation
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2020-12-16
Jacob Lifshay
fix table again
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2020-12-16
Jacob Lifshay
fix messed up table
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2020-12-16
Jacob Lifshay
fill in most non-ld/st instructions
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2020-12-16
Jacob Lifshay
add fields for 3R1W
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2020-12-16
Jacob Lifshay
change to more well-known vector op names
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2020-12-16
Jacob Lifshay
add description of remapped encoding fields
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2020-12-16
Jacob Lifshay
add more fields to svp64
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2020-12-16
Jacob Lifshay
Merge branch 'master' of ssh://git.libre-soc.org:922...
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2020-12-16
Jacob Lifshay
Merge branch 'master' of ssh://git.libre-soc.org:922...
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2020-12-16
lkcl
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2020-12-16
Jacob Lifshay
working on svp64
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2020-12-16
lkcl
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2020-12-16
lkcl
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2020-12-16
lkcl
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2020-12-16
lkcl
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2020-12-16
lkcl
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2020-12-16
lkcl
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2020-12-15
lkcl
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2020-12-15
lkcl
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2020-12-15
lkcl
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2020-12-15
lkcl
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2020-12-15
lkcl
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2020-12-15
Jacob Lifshay
working on svp64
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2020-12-14
lkcl
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2020-12-14
lkcl
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2020-12-13
lkcl
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2020-12-13
lkcl
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2020-12-13
lkcl
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2020-12-11
lkcl
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2020-12-11
lkcl
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2020-12-11
lkcl
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2020-12-11
lkcl
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2020-12-11
lkcl
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2020-12-11
lkcl
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2020-12-10
lkcl
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2020-12-10
Jacob Lifshay
add Remapped Encoding and Mask
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2020-12-10
Jacob Lifshay
reformat markdown
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2020-12-06
lkcl
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2020-12-06
lkcl
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2020-12-06
lkcl
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2020-12-04
Jacob Lifshay
convert FP registers table to be taller instead of...
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2020-12-04
Jacob Lifshay
attempt to fix tables
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2020-12-04
Jacob Lifshay
attempt to fix tables
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2020-12-04
Jacob Lifshay
attempt to fix table
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2020-12-04
Jacob Lifshay
attempt to fix tables
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2020-12-04
Jacob Lifshay
add register naming
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2020-12-03
Jacob Lifshay
add CR field vector operation semantics
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2020-12-03
Jacob Lifshay
allocate SVP64
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2020-12-01
Jacob Lifshay
add SVP rewrite plan
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2020-12-01
Jacob Lifshay
add SVP48/64 rewrite for OpenPower ISA v3.1
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