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[yosys.git]
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stat.cc
2019-05-21
Jim Lawson
Merge remote-tracking branch 'upstream/master'
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2019-05-11
Clifford Wolf
Merge pull request #1003 from makaimann/zinit-all
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2019-05-11
Clifford Wolf
Add "stat -tech xilinx"
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2019-03-28
Benedikt Tutzer
Merge remote-tracking branch 'origin/master' into featu...
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2018-09-17
Udi Finkelstein
Merge branch 'master' into pr_reg_wire_error
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2018-08-22
Jim Lawson
Merge pull request #1 from YosysHQ/master
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2018-08-18
Aman Goel
Merge pull request #3 from YosysHQ/master
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2018-08-15
Clifford Wolf
Merge pull request #573 from cr1901/msys-64
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2018-08-15
Clifford Wolf
Merge pull request #591 from hzeller/virtual-override
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2018-08-15
Clifford Wolf
Merge pull request #513 from udif/pr_reg_wire_error
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2018-08-15
Clifford Wolf
Merge pull request #562 from udif/pr_fix_illegal_port_decl
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2018-07-21
Henner Zeller
Consistent use of 'override' for virtual methods in...
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2018-07-04
Aman Goel
Merge branch 'YosysHQ-master'
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2018-07-04
Aman Goel
Merging with official repo
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2018-06-19
Clifford Wolf
Merge pull request #571 from q3k/q3k/protobuf-backend
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2018-06-19
Clifford Wolf
Merge pull request #570 from edcote/patch-4
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2018-06-19
Edmond Cote
Include module name for area summary stats
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2018-01-07
Clifford Wolf
Add support for "yosys -E"
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2017-07-14
Clifford Wolf
Add $alu to list of supported cells for "stat -width"
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2016-07-08
Clifford Wolf
Merge branch 'yosys-0.5-vtr' of https://github.com...
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2016-04-23
Andrew Zonenberg
Merge https://github.com/cliffordwolf/yosys
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2016-04-21
Clifford Wolf
Added "yosys -D" feature
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2016-02-04
Clifford Wolf
Added "stat -liberty" for calculating chip area
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2015-12-07
Clifford Wolf
Merge pull request #108 from cseed/master
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2015-10-25
Clifford Wolf
Import more std:: stuff into Yosys namespace
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2015-10-24
Clifford Wolf
improvement in "stat"
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2015-07-02
Clifford Wolf
Fixed trailing whitespaces
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2015-04-03
Ahmed Irfan
Merge branch 'master' of https://github.com/cliffordwol...
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2015-02-14
Clifford Wolf
Fixed "stat" handling of blackbox modules
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2014-10-10
Clifford Wolf
Renamed SIZE() to GetSize() because of name collision...
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2014-10-03
Clifford Wolf
sort cell types in "stat" output by name
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2014-09-27
Clifford Wolf
namespace Yosys
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2014-09-22
Ahmed Irfan
Merge branch 'master' of https://github.com/cliffordwol...
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2014-09-04
Clifford Wolf
Removed $bu0 cell type
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2014-08-22
Clifford Wolf
Added "stat -width"
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2014-07-27
Clifford Wolf
Refactoring: Renamed RTLIL::Design::modules to modules_
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2014-07-26
Clifford Wolf
Refactoring: Renamed RTLIL::Module::cells to cells_
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2014-07-26
Clifford Wolf
Refactoring: Renamed RTLIL::Module::wires to wires_
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2013-11-25
Clifford Wolf
Bugfixes in new "stat" command
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2013-11-25
Clifford Wolf
Added "stat" command
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