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[yosys.git]
/
passes
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fsm
/
fsm_detect.cc
2019-03-28
Benedikt Tutzer
Merge remote-tracking branch 'origin/master' into featu...
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2019-02-11
Jim Lawson
Merge remote-tracking branch 'upstream/master'
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2019-01-02
Clifford Wolf
Merge pull request #770 from whitequark/opt_expr_cmp
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2019-01-02
Clifford Wolf
Merge pull request #755 from Icenowy/anlogic-dram-init
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2019-01-02
Clifford Wolf
Merge pull request #750 from Icenowy/anlogic-ff-init
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2019-01-02
Clifford Wolf
Merge pull request #773 from whitequark/opt_lut_elim_fixes
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2019-01-02
Clifford Wolf
Merge pull request #772 from whitequark/synth_lut
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2019-01-02
Clifford Wolf
Merge pull request #771 from whitequark/techmap_cmp2lut
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2019-01-02
Clifford Wolf
Merge pull request #769 from whitequark/typos
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2019-01-02
whitequark
Fix typographical and grammatical errors and inconsiste...
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2018-09-17
Udi Finkelstein
Merge branch 'master' into pr_reg_wire_error
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2018-08-22
Jim Lawson
Merge pull request #1 from YosysHQ/master
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2018-08-18
Aman Goel
Merge pull request #3 from YosysHQ/master
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2018-08-15
Clifford Wolf
Merge pull request #573 from cr1901/msys-64
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2018-08-15
Clifford Wolf
Merge pull request #591 from hzeller/virtual-override
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2018-07-21
Henner Zeller
Consistent use of 'override' for virtual methods in...
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2017-04-12
Larry Doolittle
Squelch trailing whitespace
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2016-07-09
Clifford Wolf
Further improved fsm_detect output, attempt to detect...
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2016-07-09
Clifford Wolf
Added printing of some warning messages to fsm_detect
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2016-07-08
Clifford Wolf
Merge branch 'yosys-0.5-vtr' of https://github.com...
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2016-04-23
Andrew Zonenberg
Merge https://github.com/cliffordwolf/yosys
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2016-04-21
Clifford Wolf
Added "yosys -D" feature
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2015-12-07
Clifford Wolf
Merge pull request #108 from cseed/master
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2015-09-21
Clifford Wolf
Do not detect fsm state registers with init attribute
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2015-09-18
Clifford Wolf
Added $logic_not handling to fsm_detect
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2015-08-18
Clifford Wolf
Bugfix in fsm_detect for complex muxtrees
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2015-07-02
Clifford Wolf
Fixed trailing whitespaces
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2015-04-03
Ahmed Irfan
Merge branch 'master' of https://github.com/cliffordwol...
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2014-11-09
Clifford Wolf
Added log_warning() API
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2014-09-27
Clifford Wolf
namespace Yosys
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2014-09-22
Ahmed Irfan
Merge branch 'master' of https://github.com/cliffordwol...
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2014-08-14
Clifford Wolf
RIP $safe_pmux
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2014-08-02
Clifford Wolf
More cleanups related to RTLIL::IdString usage
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2014-07-31
Clifford Wolf
Renamed port access function on RTLIL::Cell, added...
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2014-07-27
Clifford Wolf
Refactoring: Renamed RTLIL::Design::modules to modules_
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2014-07-26
Clifford Wolf
Refactoring: Renamed RTLIL::Module::cells to cells_
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2014-07-26
Clifford Wolf
Refactoring: Renamed RTLIL::Module::wires to wires_
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2014-07-26
Clifford Wolf
Added RTLIL::Cell::has(portname)
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2014-07-26
Clifford Wolf
Merge automatic and manual code changes for new cell...
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2014-07-26
Clifford Wolf
Changed users of cell->connections_ to the new API...
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2014-07-26
Clifford Wolf
Renamed RTLIL::{Module,Cell}::connections to connections_
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2014-07-22
Clifford Wolf
SigSpec refactoring: using the accessor functions every...
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2014-07-22
Clifford Wolf
SigSpec refactoring: renamed chunks and width to __chun...
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2013-12-06
Clifford Wolf
Fixes in fsm detect/extract for better detection of...
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2013-10-29
Clifford Wolf
Added detection for endless recursion in fsm_detect...
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2013-03-18
Clifford Wolf
Merge branch 'hansi'
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2013-03-18
Johann Glaser
fixed typos
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2013-03-01
Clifford Wolf
Added help messages for fsm_* passes
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2013-01-05
Clifford Wolf
initial import
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