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[yosys.git]
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passes
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fsm
/
fsm_opt.cc
2019-03-28
Benedikt Tutzer
Merge remote-tracking branch 'origin/master' into featu...
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2019-02-28
Clifford Wolf
Merge pull request #794 from daveshah1/ecp5improve
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2019-02-22
Clifford Wolf
Merge pull request #740 from daveshah1/improve_dress
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2019-02-17
Eddie Hung
Merge https://github.com/YosysHQ/yosys into dff_init
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2019-02-17
Eddie Hung
Merge https://github.com/YosysHQ/yosys into read_aiger
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2019-02-17
Clifford Wolf
Merge branch 'master' of github.com:YosysHQ/yosys into...
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2019-02-15
Jim Lawson
Merge remote-tracking branch 'upstream/master'
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2019-02-12
Clifford Wolf
Merge pull request #802 from whitequark/write_verilog_a...
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2019-02-12
Clifford Wolf
Merge pull request #806 from daveshah1/fsm_opt_no_reset
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2019-02-07
David Shah
fsm_opt: Fix runtime error for FSMs without a reset...
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2018-09-17
Udi Finkelstein
Merge branch 'master' into pr_reg_wire_error
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2018-08-22
Jim Lawson
Merge pull request #1 from YosysHQ/master
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2018-08-18
Aman Goel
Merge pull request #3 from YosysHQ/master
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2018-08-15
Clifford Wolf
Merge pull request #573 from cr1901/msys-64
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2018-08-15
Clifford Wolf
Merge pull request #591 from hzeller/virtual-override
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2018-07-21
Henner Zeller
Consistent use of 'override' for virtual methods in...
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2016-07-08
Clifford Wolf
Merge branch 'yosys-0.5-vtr' of https://github.com...
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2016-04-23
Andrew Zonenberg
Merge https://github.com/cliffordwolf/yosys
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2016-04-21
Clifford Wolf
Added "yosys -D" feature
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2015-12-07
Clifford Wolf
Merge pull request #108 from cseed/master
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2015-10-24
Clifford Wolf
renamed SigSpec::to_single_sigbit() to SigSpec::as_bit...
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2015-07-02
Clifford Wolf
Fixed trailing whitespaces
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2015-04-03
Ahmed Irfan
Merge branch 'master' of https://github.com/cliffordwol...
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2014-10-14
Clifford Wolf
Merge branch 'win32'
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2014-10-14
William Speirs
Changed from "and" to "&&"
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2014-10-10
Clifford Wolf
Renamed SIZE() to GetSize() because of name collision...
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2014-09-27
Clifford Wolf
namespace Yosys
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2014-09-22
Ahmed Irfan
Merge branch 'master' of https://github.com/cliffordwol...
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2014-08-09
Clifford Wolf
Some improvements in fsm_opt and fsm_map for FSM with...
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2014-07-31
Clifford Wolf
Renamed port access function on RTLIL::Cell, added...
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2014-07-27
Clifford Wolf
Refactoring: Renamed RTLIL::Design::modules to modules_
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2014-07-26
Clifford Wolf
Refactoring: Renamed RTLIL::Module::cells to cells_
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2014-07-26
Clifford Wolf
Merge automatic and manual code changes for new cell...
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2014-07-26
Clifford Wolf
Manual fixes for new cell connections API
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2014-07-26
Clifford Wolf
Changed users of cell->connections_ to the new API...
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2014-07-26
Clifford Wolf
Renamed RTLIL::{Module,Cell}::connections to connections_
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2014-07-22
Clifford Wolf
SigSpec refactoring: cleanup of old SigSpec usage in...
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2014-07-22
Clifford Wolf
fixed memory leak in fsm_opt
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2014-07-22
Clifford Wolf
SigSpec refactoring: using the accessor functions every...
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2014-07-22
Clifford Wolf
SigSpec refactoring: renamed chunks and width to __chun...
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2013-12-04
Clifford Wolf
Replaced RTLIL::Const::str with generic decoder method
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2013-06-05
Clifford Wolf
Renamed opt_rmunused to opt_clean
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2013-03-01
Clifford Wolf
Added help messages for fsm_* passes
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2013-01-05
Clifford Wolf
initial import
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