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Bugfix in hierarchy blackbox module port width handling
[yosys.git]
/
passes
/
hierarchy
/
hierarchy.cc
2018-01-07
Clifford Wolf
Bugfix in hierarchy blackbox module port width handling
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2018-01-05
Clifford Wolf
Merge pull request #479 from Fatsie/latch_without_data
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2018-01-05
Clifford Wolf
Bugfix in hierarchy handling of blackbox module ports
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2018-01-04
Clifford Wolf
Merge pull request #480 from Fatsie/liberty_value_expre...
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2018-01-04
Clifford Wolf
Temporarily derive blackbox modules in hierarchy to...
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2017-07-22
Clifford Wolf
Add error for cell output ports that are connected...
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2017-07-21
Clifford Wolf
Fix handling of empty cell port assignments (i.e. ignor...
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2017-02-25
Clifford Wolf
Merge branch 'master' of https://github.com/klammerj...
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2017-02-25
Clifford Wolf
Merge branch 'master' of github.com:cliffordwolf/yosys
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2017-02-25
Clifford Wolf
Add $live and $fair cell types, add support for s_event...
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2017-02-14
Andrew Zonenberg
Merge https://github.com/cliffordwolf/yosys
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2017-02-13
Clifford Wolf
Do not fix port widths on any blackbox instances
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2017-02-12
Clifford Wolf
Do not eagerly fix port widths on parameterized cells
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2017-02-11
Clifford Wolf
Merge branch 'master' of https://github.com/stv0g/yosys...
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2017-02-09
Andrew Zonenberg
Merge https://github.com/cliffordwolf/yosys
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2017-02-04
Clifford Wolf
Add $cover cell type and SVA cover() support
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2017-01-31
Clifford Wolf
Merge branch 'opt_compare_pr' of https://github.com...
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2017-01-26
Clifford Wolf
Merge branch 'master' of github.com:cliffordwolf/yosys
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2017-01-16
Clifford Wolf
Merge pull request #293 from thoughtpolice/minor-cleanup
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2017-01-15
Austin Seipp
passes/hierarchy: delete some dead code
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2017-01-01
Andrew Zonenberg
Merge https://github.com/cliffordwolf/yosys
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2017-01-01
Clifford Wolf
Added cell port resizing to hierarchy pass
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2016-11-15
Clifford Wolf
Added support for hierarchical defparams
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2016-11-02
Clifford Wolf
Bugfix in "hierarchy -check"
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2016-10-22
Clifford Wolf
Added avail params to ilang format, check module params...
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2016-08-28
Clifford Wolf
Removed $predict again
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2016-08-16
Clifford Wolf
Fixed use-after-free dict<> usage pattern in hierarchy.cc
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2016-07-21
Clifford Wolf
After reading the SV spec, using non-standard predict...
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2016-07-13
Clifford Wolf
Added basic support for $expect cells
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2016-07-08
Clifford Wolf
Merge branch 'yosys-0.5-vtr' of https://github.com...
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2016-05-22
Clifford Wolf
Merge pull request #172 from zeldin/deterministic_hierarchy
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2016-05-22
Marcus Comstedt
Made the expansion order of hierarchy deterministic
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2016-04-23
Andrew Zonenberg
Merge https://github.com/cliffordwolf/yosys
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2016-04-21
Clifford Wolf
Added "yosys -D" feature
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2016-03-21
Clifford Wolf
Cleanup abstract modules at end of "hierarchy -top"
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2015-12-07
Clifford Wolf
Merge pull request #108 from cseed/master
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2015-10-25
Clifford Wolf
Import more std:: stuff into Yosys namespace
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2015-08-14
Clifford Wolf
Spell check (by Larry Doolittle)
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2015-07-25
Clifford Wolf
Keep modules with $assume (like $assert)
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2015-07-02
Clifford Wolf
Fixed trailing whitespaces
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2015-04-04
Clifford Wolf
Added "dffinit", Support for initialized Xilinx DFF
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2015-04-03
Ahmed Irfan
Merge branch 'master' of https://github.com/cliffordwol...
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2015-03-29
Clifford Wolf
documentation improvements
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2015-03-18
Clifford Wolf
Added hierarchy -auto-top
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2015-03-04
Clifford Wolf
Fixed bug in "hierarchy" for parametric designs
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2015-02-15
Clifford Wolf
Cosmetic fixes in "hierarchy" for blackbox modules
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2015-01-04
Clifford Wolf
Fixed pattern matching in "hierarchy -generate"
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2014-12-26
Clifford Wolf
Added Yosys::{dict,nodict,vector} container types
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2014-12-24
Clifford Wolf
Fixed off-by-one bug in "hierarchy -check" for position...
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2014-12-19
Clifford Wolf
Checking existence of ports in "hierarchy -check"
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2014-11-27
Clifford Wolf
Fixed bug in "hierarchy -top" with array of instances
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2014-10-17
Clifford Wolf
Various win32 / vs build fixes
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2014-10-17
William Speirs
Header changes so it will compile on VS
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2014-10-11
Clifford Wolf
Do not the 'z' modifier in format string (another win32...
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2014-10-10
Clifford Wolf
Moved patmatch() to yosys.cc
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2014-10-10
Clifford Wolf
Replaced fnmatch() with patmatch()
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2014-09-30
Clifford Wolf
set "keep" on modules with $assert cells in "hierarchy"
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2014-09-27
Clifford Wolf
namespace Yosys
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2014-09-22
Ahmed Irfan
Merge branch 'master' of https://github.com/cliffordwol...
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2014-09-06
Clifford Wolf
Merge branch 'master' of github.com:cliffordwolf/yosys
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2014-09-06
Clifford Wolf
Merge pull request #38 from rubund/master
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2014-09-06
Ruben Undheim
Corrected spelling mistakes found by lintian
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2014-08-14
Clifford Wolf
Added module->ports
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2014-08-02
Clifford Wolf
More bugfixes related to new RTLIL::IdString
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2014-08-02
Clifford Wolf
More cleanups related to RTLIL::IdString usage
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2014-07-31
Clifford Wolf
Added module->design and cell->module, wire->module...
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2014-07-29
Clifford Wolf
Allow "hierarchy -generate" for $__ cells
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2014-07-28
Clifford Wolf
Using log_assert() instead of assert()
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2014-07-27
Clifford Wolf
Refactoring: Renamed RTLIL::Design::modules to modules_
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2014-07-26
Clifford Wolf
Refactoring: Renamed RTLIL::Module::cells to cells_
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2014-07-26
Clifford Wolf
Refactoring: Renamed RTLIL::Module::wires to wires_
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2014-07-26
Clifford Wolf
Changed a lot of code to the new RTLIL::Wire constructors
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2014-07-26
Clifford Wolf
Merge automatic and manual code changes for new cell...
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2014-07-26
Clifford Wolf
Manual fixes for new cell connections API
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2014-07-26
Clifford Wolf
Changed users of cell->connections_ to the new API...
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2014-07-26
Clifford Wolf
Renamed RTLIL::{Module,Cell}::connections to connections_
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2014-07-22
Clifford Wolf
SigSpec refactoring: using the accessor functions every...
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2014-07-22
Clifford Wolf
SigSpec refactoring: renamed chunks and width to __chun...
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2014-06-07
Clifford Wolf
fixed cell array handling of positional arguments
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2014-06-07
Clifford Wolf
Add support for cell arrays
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2014-02-13
Clifford Wolf
Implemented read_verilog -defer
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2014-02-04
Clifford Wolf
Added hierarchy -purge_lib option
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2014-01-15
Ahmed Irfan
Merge branch 'master' of https://github.com/ahmedirfan1...
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2014-01-15
Ahmed Irfan
Merge pull request #2 from cliffordwolf/master
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2014-01-14
Clifford Wolf
Merge pull request #20 from mschmoelzer/master
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2014-01-14
Martin Schmölzer
Include unistd.h in passes/hierarchy/hierarchy.cc ...
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2014-01-14
Clifford Wolf
Added hierarchy -libdir option
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2013-12-04
Clifford Wolf
Replaced signed_parameters API with CONST_FLAG_SIGNED
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2013-11-24
Clifford Wolf
Remove auto_wire framework (smarter than the verilog...
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2013-11-24
Clifford Wolf
Implemented correct handling of signed module parameters
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2013-11-24
Clifford Wolf
Added "top" attribute to mark top module in hierarchy
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2013-11-22
Clifford Wolf
Renamed "placeholder" to "blackbox"
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2013-11-03
Clifford Wolf
Merge branch 'master' of github.com:cliffordwolf/yosys
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2013-11-03
Clifford Wolf
Added resolution of positional arguments to hierarchy...
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2013-10-24
Clifford Wolf
Fixed handling of boolean attributes (passes)
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2013-05-26
Clifford Wolf
Improved log messages generated by hierarchy pass
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2013-05-16
Clifford Wolf
Merge branch 'bugfix'
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2013-04-26
Clifford Wolf
Fixed hierarchy pass for hierarchies of parametric...
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2013-03-28
Clifford Wolf
Implemented proper handling of stub placeholder modules
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2013-03-26
Clifford Wolf
Collect parameters in hierarchy -generate (and do nothi...
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