Merge pull request #1105 from YosysHQ/clifford/fixlogicinit
[yosys.git] / passes / memory /
2015-02-14 Clifford WolfVarious fixes for memories with offsets
2015-02-14 Clifford WolfAdded $meminit support to "memory" command
2015-02-04 Clifford WolfAdded onehot attribute
2015-02-01 Clifford WolfMerge branch 'master' of github.com:cliffordwolf/yosys
2015-02-01 Clifford WolfMerge pull request #48 from rubund/master
2015-02-01 Ruben UndheimFixed typos found by lintian
2015-01-18 Clifford WolfMerge branch 'master' of github.com:cliffordwolf/yosys
2015-01-18 Clifford WolfRefactoring of memory_bram and xilinx brams
2015-01-06 Clifford Wolfmemory_bram hotfix for memories with width 1
2015-01-06 Clifford Wolfremoved old debug code
2015-01-06 Clifford WolfTowards Xilinx bram support
2015-01-06 Clifford WolfTowards Xilinx bram support
2015-01-05 Clifford WolfTowards Xilinx bram support
2015-01-04 Clifford WolfTowards Xilinx bram support
2015-01-04 Clifford WolfAdded memory_bram "shuffle_enable" feature
2015-01-04 Clifford WolfRemoved left over debug code from memory_bram
2015-01-03 Clifford WolfAdded "memory -bram"
2015-01-03 Clifford WolfAdded memory_bram 'or_next_if_better' feature
2015-01-03 Clifford Wolfmemory_bram transp support
2015-01-03 Clifford WolfProgress in memory_bram
2015-01-02 Clifford WolfAdded proper clkpol support to memory_bram
2015-01-02 Clifford WolfProgress in memory_bram
2015-01-01 Clifford WolfProgress in memory_bram
2015-01-01 Clifford WolfProgress in memory_bram
2015-01-01 Clifford WolfProgress in memory_bram
2014-12-31 Clifford WolfProgress in memory_bram
2014-12-31 Clifford WolfAdded memory_bram (not functional yet)
2014-12-27 Clifford WolfMore dict/pool related changes
2014-12-24 Clifford WolfRenamed extend() to extend_xx(), changed most users...
2014-10-10 Clifford WolfRenamed SIZE() to GetSize() because of name collision...
2014-09-27 Clifford Wolfnamespace Yosys
2014-09-22 Ahmed IrfanMerge branch 'master' of https://github.com/cliffordwol...
2014-09-16 Clifford WolfFixed $memwr/$memrd order in memory_dff
2014-09-06 Clifford WolfMerge branch 'master' of github.com:cliffordwolf/yosys
2014-09-06 Clifford WolfMerge pull request #38 from rubund/master
2014-09-06 Ruben UndheimCorrected spelling mistakes found by lintian
2014-08-30 Clifford WolfImproved write address decoder generation memory_map
2014-08-30 Clifford WolfUsing worker class in memory_map
2014-08-06 Clifford WolfVarious improvements in memory_dff pass
2014-08-02 Clifford WolfNo implicit conversion from IdString to anything else
2014-08-02 Clifford WolfMore cleanups related to RTLIL::IdString usage
2014-08-01 Clifford WolfAdded ModIndex helper class, some changes to RTLIL...
2014-07-31 Clifford WolfRenamed modwalker.h to modtools.h
2014-07-31 Clifford WolfRenamed port access function on RTLIL::Cell, added...
2014-07-31 Clifford WolfMoved some stuff to kernel/yosys.{h,cc}, using Yosys...
2014-07-29 Clifford WolfAdded $shift and $shiftx cell types (needed for correct...
2014-07-28 Clifford WolfUsing log_assert() instead of assert()
2014-07-27 Clifford WolfUsing new obj iterator API in a few places
2014-07-27 Clifford WolfRefactoring: Renamed RTLIL::Design::modules to modules_
2014-07-26 Clifford WolfRefactoring: Renamed RTLIL::Module::cells to cells_
2014-07-26 Clifford WolfRefactoring: Renamed RTLIL::Module::wires to wires_
2014-07-26 Clifford WolfChanged a lot of code to the new RTLIL::Wire constructors
2014-07-26 Clifford WolfMerge automatic and manual code changes for new cell...
2014-07-26 Clifford WolfManual fixes for new cell connections API
2014-07-26 Clifford WolfChanged users of cell->connections_ to the new API...
2014-07-26 Clifford WolfRenamed RTLIL::{Module,Cell}::connections to connections_
2014-07-25 Clifford WolfUse only module->addCell() and module->remove() to...
2014-07-24 Clifford WolfReplaced more old SigChunk programming patterns
2014-07-23 Clifford WolfRemoved RTLIL::SigSpec::optimize()
2014-07-23 Clifford WolfFixed all users of SigSpec::chunks_rw() and removed it
2014-07-23 Clifford WolfMerge branch: Refactoring {SigSpec|SigChunk}(RTLIL...
2014-07-23 Clifford WolfRefactoring {SigSpec|SigChunk}(RTLIL::Wire *wire, ...
2014-07-23 Clifford WolfRefactoring {SigSpec|SigChunk}(RTLIL::Wire *wire, ...
2014-07-22 Clifford WolfSigSpec refactoring: change RTLIL::SigSpec::chunks...
2014-07-22 Clifford WolfSigSpec refactoring: using the accessor functions every...
2014-07-22 Clifford WolfSigSpec refactoring: renamed chunks and width to __chun...
2014-07-21 Clifford WolfRemoved deprecated module->new_wire()
2014-07-19 Clifford WolfImproved memory_share log messages
2014-07-19 Clifford WolfMore verbose memory_share help message
2014-07-19 Clifford WolfAdded SAT-based write-port sharing to memory_share
2014-07-19 Clifford WolfFixed bug in memory_share feedback-to-en code
2014-07-18 Clifford WolfAdded translation from read-feedback to en-signals...
2014-07-18 Clifford WolfOnly create collision detect logic in memory_share...
2014-07-18 Clifford WolfAdded memory_share
2014-07-16 Clifford WolfMerged new $mem/$memwr WR_EN interface
2014-07-16 Clifford WolfChanges to "memory" pass for new $memwr/$mem WR_EN...
2014-06-01 Clifford WolfFixed log messages in memory_dff
2014-02-08 Clifford WolfMerge branch 'master' of github.com:cliffordwolf/yosys
2014-02-08 Clifford WolfFixed bug in collecting of RD_TRANSPARENT parameter...
2014-02-03 Clifford WolfAdded TRANSPARENT parameter to $memrd (and RD_TRANSPARE...
2014-02-02 Clifford WolfOnly generate write-enable $and if WE is not constant...
2014-01-18 Ahmed IrfanMerge branch 'master' of https://github.com/cliffordwol...
2014-01-17 Ahmed IrfanMerge branch 'master' of https://github.com/ahmedirfan1...
2014-01-17 Ahmed IrfanMerge pull request #3 from cliffordwolf/master
2014-01-16 Clifford WolfAdded automatic memid generation to memory_unpack command
2014-01-16 Clifford WolfAdded memory_unpack command
2014-01-03 Ahmed IrfanMerge branch 'master' of https://github.com/cliffordwol...
2014-01-02 Clifford WolfAdded correct handling of $memwr priority
2013-12-04 Clifford WolfReplaced RTLIL::Const::str with generic decoder method
2013-12-01 Clifford WolfA fix in memory_dff for write ports with static addresses
2013-10-29 Clifford WolfFixed help message typo (memory pass)
2013-10-17 Clifford WolfFixed bug in synthesis of memories that are never written
2013-03-21 Clifford WolfAdded -nomap option to memory pass
2013-03-01 Clifford WolfAdded help messages to memory_* passes
2013-01-05 Clifford Wolfinitial import