Revert "Merge pull request #1917 from YosysHQ/eddie/abc9_delay_check"
[yosys.git] / passes / pmgen / xilinx_dsp_cascade.pmg
2020-05-03 whitequarkMerge pull request #2000 from whitequark/log_error...
2020-05-01 Claire WolfMerge pull request #1981 from YosysHQ/claire/fix1837
2020-04-24 whitequarkMerge pull request #1998 from whitequark/cxxrtl-fixes
2020-04-23 Eddie HungMerge pull request #1974 from YosysHQ/eddie/abc9_disabl...
2020-04-23 Claire WolfMerge pull request #1989 from boqwxp/qbfsat_anyconst_so...
2020-04-23 Claire WolfMerge pull request #1988 from boqwxp/qbfsat
2020-04-23 Claire WolfMerge pull request #1986 from YosysHQ/eddie/verific_enum
2020-04-23 Eddie HungMerge pull request #1984 from YosysHQ/eddie/getParam_ex...
2020-04-23 Eddie Hungxilinx: xilinx_dsp_cascade to check CREG for DSP48E1...
2020-04-22 Eddie HungMerge pull request #1949 from YosysHQ/eddie/select_blackbox
2020-04-22 Eddie HungMerge pull request #1983 from YosysHQ/eddie/use_default...
2020-04-22 Eddie HungCleanup use of hard-coded default parameters in light...
2020-02-01 Eddie HungMerge branch 'master' into eddie/submod_po
2020-01-29 Claire WolfMerge branch 'vector_fix' of https://github.com/Kmanfi...
2020-01-29 N. EngelhardtMerge pull request #1510 from pumbor/master
2020-01-29 Miodrag MilanovićMerge pull request #1559 from YosysHQ/efinix_test_fix
2020-01-28 Eddie HungMerge remote-tracking branch 'origin/master' into eddie...
2020-01-28 Claire WolfMerge pull request #1567 from YosysHQ/eddie/sat_init_wa...
2020-01-28 N. EngelhardtMerge pull request #1573 from YosysHQ/eddie/xilinx_tristate
2020-01-28 Claire WolfMerge pull request #1553 from whitequark/manual-dffx
2020-01-27 Eddie HungMerge remote-tracking branch 'origin/master' into eddie...
2020-01-03 N. EngelhardtMerge branch 'master' of https://github.com/YosysHQ...
2019-12-30 Eddie HungMerge remote-tracking branch 'origin/master' into xaig_dff
2019-12-28 Miodrag MilanovicMerge remote-tracking branch 'origin/master' into iopad...
2019-12-25 Marcin KościelnickiMerge pull request #1593 from YosysHQ/mwk/dsp48a1-pmgen
2019-12-25 Marcin KościelnickiMinor nit fixes
2019-12-23 Eddie HungFix OPMODE for PCIN->PCOUT cascades in xc6s, check...
2019-12-23 Eddie HungFix CEA/CEB check
2019-12-23 Eddie HungFix checking CE[AB] and for direct connections
2019-12-23 Eddie HungSupport unregistered cascades for A and B inputs
2019-12-23 Eddie HungAdd DSP48A* PCOUT -> PCIN cascade support
2019-11-22 Eddie HungMerge branch 'master' of github.com:YosysHQ/yosys
2019-10-27 Clifford WolfMerge pull request #1393 from whitequark/write_verilog...
2019-10-21 Pepijn de VosMerge branch 'master' of https://github.com/YosysHQ...
2019-10-18 Miodrag MilanovićMerge branch 'master' into mmicko/efinix
2019-10-18 Miodrag MilanovićMerge branch 'master' into mmicko/anlogic
2019-10-18 Miodrag MilanovićMerge branch 'master' into eddie/pr1352
2019-10-14 Clifford WolfUse "(id)" instead of "id" for types as temporary hack
2019-10-08 Eddie HungMerge remote-tracking branch 'origin/master' into xaig_dff
2019-10-08 Eddie HungMerge pull request #1432 from YosysHQ/eddie/fix1427
2019-10-08 Eddie HungMerge pull request #1433 from YosysHQ/eddie/equiv_opt_a...
2019-10-08 Eddie HungMerge pull request #1437 from YosysHQ/eddie/abc_to_abc9
2019-10-08 Eddie HungMerge pull request #1438 from YosysHQ/eddie/xilinx_dsp_...
2019-10-05 Eddie HungAdd comment on why we have to match for clock-enable...
2019-10-05 Eddie HungAdd comments for xilinx_dsp_cascade
2019-10-01 SergeyMerge branch 'master' into SergeyDegtyar/efinix
2019-10-01 SergeyMerge branch 'master' into SergeyDegtyar/anlogic
2019-09-30 Eddie HungMerge branch 'SergeyDegtyar/ecp5' of https://github...
2019-09-30 whitequarkMerge pull request #1406 from whitequark/connect_rpc
2019-09-30 Eddie HungMerge pull request #1397 from btut/fix/python_wrappers_...
2019-09-30 Miodrag MilanovićMerge pull request #1416 from YosysHQ/mmicko/frontend_b...
2019-09-30 Clifford WolfMerge pull request #1412 from YosysHQ/eddie/equiv_opt_a...
2019-09-30 Eddie HungMerge remote-tracking branch 'origin/master' into xaig_dff
2019-09-30 Eddie HungMerge pull request #1414 from hzeller/improve-replace...
2019-09-29 Eddie HungMerge pull request #1359 from YosysHQ/xc7dsp
2019-09-27 Eddie HungOoops AREG and BREG to default to -1
2019-09-26 Eddie HungDo not always zero out C (e.g. during cascade breaks)
2019-09-26 Eddie HungZero out ports
2019-09-26 Eddie Hungxilinx_dsp_cascade to also cascade AREG and BREG
2019-09-26 Eddie HungTry recursive pmgen for P cascade
2019-09-23 Eddie HungMove unextend initialisation later
2019-09-23 Eddie HungMerge remote-tracking branch 'origin/master' into xc7dsp
2019-09-20 Eddie HungOPMODE is port not param
2019-09-20 Eddie HungMerge remote-tracking branch 'origin/master' into xc7dsp
2019-09-20 Eddie HungWIP for xiinx_dsp_cascadeAB
2019-09-20 Eddie HungAdd a xilinx_dsp_cascade matcher for PCIN -> PCOUT